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Disable AVX emulation
Set default for streaming stores to "no"
Correct QPX vectorisation (IBM Blue Gene/Q)
Add MIC vectorisation (Intel Xeon Phi)
Convert SSE and AVX vectorisation to using inline functions instead of
macros for code clarity
Define CCTK_BOOLEAN, CCTK_INTEGER and CCTK_BOOLEAN_VEC,
CCTK_INTEGER_VEC to make boolean and integer vectors explicit
git-svn-id: https://svn.cct.lsu.edu/repos/numrel/LSUThorns/Vectors/trunk@77 105869f7-3296-0410-a4ea-f4349344b45a
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This allows you to check that a simulation is using vectorisation.
git-svn-id: https://svn.cct.lsu.edu/repos/numrel/LSUThorns/Vectors/trunk@11 105869f7-3296-0410-a4ea-f4349344b45a
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Introduce configuration-time options for vectorisation, including
options to allow architecture-specific choices that may influence
performance.
Introduce "middle" masked stores for large vector sizes and small
loops.
Clean up and simplify some of the implementation code.
git-svn-id: https://svn.cct.lsu.edu/repos/numrel/LSUThorns/Vectors/trunk@10 105869f7-3296-0410-a4ea-f4349344b45a
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git-svn-id: https://svn.cct.lsu.edu/repos/numrel/LSUThorns/Vectors/trunk@2 105869f7-3296-0410-a4ea-f4349344b45a
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