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authorgoodale <goodale@b61c5cb5-eaca-4651-9a7a-d64986f99364>2005-12-14 22:14:41 +0000
committergoodale <goodale@b61c5cb5-eaca-4651-9a7a-d64986f99364>2005-12-14 22:14:41 +0000
commit7cc7be1acf8f2519657e78a8bdee81920b1dc5f5 (patch)
tree8b9ac35a5b9ec0397b2d70af1b88ad64969a94c4 /param.ccl
parent39c19b80c226f853d899d6e06c84733e22d780bd (diff)
Changes from Dylan Stark to allow registration of topology
routines and introducing a physical to logical processor mapping. Now it is possible to register custom topology routines if you don't like the two ones we have at the moment (the traditional one and the new one from Frank Loeffler). You can also provide routines to optimise the placement of neighbouring processes on the processors by giving a custom mapping from the numbers PUGH uses for the processors to the actual MPI processor. Please treat this registration as semi-volatile for the moment and coordinate with Dylan if you fancy using it. git-svn-id: http://svn.cactuscode.org/arrangements/CactusPUGH/PUGH/trunk@475 b61c5cb5-eaca-4651-9a7a-d64986f99364
Diffstat (limited to 'param.ccl')
-rw-r--r--param.ccl10
1 files changed, 10 insertions, 0 deletions
diff --git a/param.ccl b/param.ccl
index 5a751ca..da5af5b 100644
--- a/param.ccl
+++ b/param.ccl
@@ -112,6 +112,14 @@ BOOLEAN enable_all_storage "Enable storage for all GFs?"
# Processor topology
+restricted:
+
+KEYWORD physical2logical "Physical process to logical process mapping method to use" STEERABLE = RECOVER
+{
+ "direct" :: "Maps MPI IDs directly to IJKs"
+ "example" :: "Maps MPI IDs directly to IJKs using a lookup table"
+} "direct"
+
KEYWORD processor_topology "How to determine the processor topology" STEERABLE = RECOVER
{
"manual" :: "Specified by proc_top_nx etc"
@@ -119,6 +127,8 @@ KEYWORD processor_topology "How to determine the processor topology" STEERABLE =
"automatic_old" :: "Automatically generated (old method)"
} "automatic"
+private:
+
INT processor_topology_1d_x "No of Procs in X direction" STEERABLE = RECOVER
{
0:* :: "See proc_topology"