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author | eschnett <eschnett@4054007a-4839-4648-a056-eb81e030d849> | 2011-09-12 17:13:15 +0000 |
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committer | eschnett <eschnett@4054007a-4839-4648-a056-eb81e030d849> | 2011-09-12 17:13:15 +0000 |
commit | ead4d9e647258cdb655db14bc083e028e05247f7 (patch) | |
tree | 8a658d12fb969506d7ffedfb56b15b0fb72f01e2 | |
parent | 70b7032f5463b2e0a9301f06141d3e918e10edda (diff) |
List available OpenCL implementations
git-svn-id: http://svn.cactuscode.org/projects/ExternalLibraries/OpenCL/trunk@3 4054007a-4839-4648-a056-eb81e030d849
-rw-r--r-- | README | 30 |
1 files changed, 30 insertions, 0 deletions
@@ -21,3 +21,33 @@ personal computers, servers and handheld/embedded devices. OpenCL (Open Computing Language) greatly improves speed and responsiveness for a wide spectrum of applications in numerous market categories from gaming and entertainment to scientific and medical software. + + + +There seem to be four OpenCL implementations available at this time. +Unfortunately, they each have their drawbacks: + +- AMD: Available at + <http://developer.amd.com/zones/openclzone/pages/default.aspx>. This + supports both CPUs and ATI GPUs. Unfortunately, the OpenCL compiler + seems to produce code with a low quality. + +- Apple: Included with the operating system, available by default. + This supports both CPU and GPU. The compiler is based on LLVM. + Unfortunately, there seem to be serious bugs -- I can't get the cos + function to provide correct results. + +- Intel: Available at + <http://software.intel.com/en-us/articles/opencl-sdk/>. This + supports only (Intel?) CPUs. The compiler is based on LLVM, and the + implementation is also based on Intel's TBB (Threading Building + Blocks). I don't know how to disassemble the generated code, except + when there is a segfault. + +- NVidia: Available at <http://developer.nvidia.com/opencl>, included + in their CUDA distribution. This supports only GPUs. + +In addition, Wikipedia <http://en.wikipedia.org/wiki/OpenCL> lists two +IBM implementations for their Power processor and for Intel compatible +CPUs, respectively. The latter may be identical with or similar to +AMD's implementation. |