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path: root/libavutil/arm/intreadwrite.h
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* ARM: use Q/R inline asm operand modifiers only if supportedMans Rullgard2012-08-07
| | | | | | | | | | Some compilers do not support the Q/R modifiers used to access the low/high parts of a 64-bit register pair. Check for this and disable all uses of it when not supported. Fixes bug #337. Signed-off-by: Mans Rullgard <mans@mansr.com>
* arm: intreadwrite: revert 16-bit load asm to old version for gcc < 4.6Mans Rullgard2012-05-03
| | | | | | | | Commit adebad0 "arm: intreadwrite: fix inline asm constraints for gcc 4.6 and later" caused some older gcc versions to miscompile code. This reverts to the old version of the code for these compilers. Signed-off-by: Mans Rullgard <mans@mansr.com>
* arm: intreadwrite: disable inline asm for gcc 4.7 and laterMans Rullgard2012-05-02
| | | | | | | | Starting with version 4.7, gcc properly supports unaligned memory accesses on ARM. Not using the inline asm with these compilers results in better code. Signed-off-by: Mans Rullgard <mans@mansr.com>
* arm: intreadwrite: fix inline asm constraints for gcc 4.6 and laterMans Rullgard2012-05-02
| | | | | | | | | | | | | | | | | | | | With a dereferenced type-cast pointer as memory operand, gcc 4.6 and later will sometimes copy the data to a temporary location, the address of which is used as the operand value, if it thinks the target address might be misaligned. Using a pointer to a packed struct type instead does the right thing. The 16-bit case is special since the ldrh instruction addressing modes are limited compared to ldr. The "Uq" constraint produces a memory reference suitable for an ldrsb instruction, which supports the same addressing modes as ldrh. However, the restrictions appear to apply only when the operand addresses a single byte. The memory reference must thus be split into two operands each targeting one byte. Finally, the "Uq" constraint is only available in ARM mode. The Thumb-2 ldrh instruction supports most addressing modes so the normal "m" constraint can be used there. Signed-off-by: Mans Rullgard <mans@mansr.com>
* ARM: simplify inline asm with 64-bit operandsMans Rullgard2011-05-30
| | | | Signed-off-by: Mans Rullgard <mans@mansr.com>
* Replace FFmpeg with Libav in licence headersMans Rullgard2011-03-19
| | | | Signed-off-by: Mans Rullgard <mans@mansr.com>
* ARM: change return type of AV_RN16() to unsignedMåns Rullgård2010-09-26
| | | | | | | This prevents gcc inserting useless UXTH instructions, at least in some cases. Originally committed as revision 25212 to svn://svn.ffmpeg.org/ffmpeg/trunk
* Mark all intreadwrite functions av_always_inlineMåns Rullgård2010-01-18
| | | | Originally committed as revision 21278 to svn://svn.ffmpeg.org/ffmpeg/trunk
* ARM: first value loaded in AV_RN64 needs to be early-clobberMåns Rullgård2009-08-16
| | | | Originally committed as revision 19656 to svn://svn.ffmpeg.org/ffmpeg/trunk
* ARM asm for AV_RN*()Måns Rullgård2009-04-18
ARMv6 and later support unaligned loads and stores for single word/halfword but not double/multiple. GCC is ignorant of this and will always use bytewise accesses for unaligned data. Casting to an int32_t pointer is dangerous since a load/store double or multiple instruction might be used (this happens with some code in FFmpeg). Implementing the AV_[RW]* macros with inline asm using only supported instructions gives fast and safe unaligned accesses. ARM RVCT does the right thing with generic code. This gives an overall speedup of up to 10%. Originally committed as revision 18601 to svn://svn.ffmpeg.org/ffmpeg/trunk