| Commit message (Collapse) | Author | Age |
|
|
|
|
|
|
| |
The .text section is already 16-byte aligned by default on all supported
platforms so `SECTION_TEXT` isn't any different from `SECTION .text`.
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
|
| |
Signed-off-by: James Almer <jamrial@gmail.com>
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
|
|
|
|
| |
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
| |
4775 decicycles -> 3688 decicycles
|
|
|
|
| |
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
|
|
|
|
| |
Dead code elimination is enough to avoid undefined references in these cases.
|
|
|
|
| |
All copyright holders have agreed to the relicensing.
|
| |
|
| |
|
|
|
|
| |
Signed-off-by: Diego Biurrun <diego@biurrun.de>
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Always use the special filter for the first and last 3 columns (only).
Changes made in 64ed397 slowed the filter to just under 3/4 of what it
was. This commit restores the speed while maintaining identical output.
For reference, on my Athlon64:
1733222 decicycles in old
2358563 decicycles in new
1727558 decicycles in this
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
| |
|
| |
|
| |
|
|
|
|
|
|
| |
There is no noticable benefit for such precision.
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
|
|
| |
Current dithering only uses the first 4 instead of the whole 8 random values.
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Current code divides before increasing precision.
Also reduce upper bound for strength from 255 to 64. This will prevent
an overflow in the SSSE3 and MMX filter_line code: delta is expressed as
an u16 being shifted by 2 to the left. If it overflows, having a
strength not above 64 will make sure that m is set to 0 (making the
m*m*delta >> 14 expression void).
A value above 64 should not make any sense unless gradfun is used as
a blur filter.
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
|
| |
CC:libav-stable@libav.org
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
| |
Some changes in the border pixels, visually indistinguishable.
|
|
|
|
|
|
|
| |
clang says:
libavfilter/vf_yadif.c:192:28: warning: incompatible pointer types assigning to
'void (*)(uint8_t *, uint8_t *, uint8_t *, uint8_t *, int, int, int, int, int)'
from 'void (uint16_t *, uint16_t *, uint16_t *, uint16_t *, int, int, int, int, int)'
|
| |
|
| |
|
|
|
|
|
|
|
| |
Manually load registers to avoid using 8 registers on x86_32 with
compilers that do not align the stack (e.g. MSVC).
Signed-off-by: Diego Biurrun <diego@biurrun.de>
|
|
|
|
| |
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
|
| |
|
| |
|
| |
|
|
|
|
|
| |
This is more consistent with the way we handle C #includes and
it simplifies the build system.
|
|
|
|
| |
This is necessary to allow refactoring some x86util macros with cpuflags.
|
| |
|
| |
|
| |
|
|
|
|
|
| |
13% faster on penryn, 16% on sandybridge, 15% on bulldozer
Not simd; a compiler should have generated this, but gcc didn't.
|
|
|
|
| |
Signed-off-by: Martin Storsjö <martin@martin.st>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Under some circumstances, suncc will use a single register for the
address of all memory operands, inserting lea instructions loading
the correct address prior to each memory operand being used in the
code. In the yadif code, the branch in the asm block bypasses such
an lea instruction, causing an incorrect address to be used in the
following load.
This patch replaces the tmpX arrays with a single array and uses a
register operand to hold its address. Although this prevents using
offsets from the stack pointer to access these locations, the code
still builds as 32-bit PIC even with old compilers.
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
|
|
|
| |
This puts x86-specific things in the x86/ subdirectory where they
belong.
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
|
|
|
| |
Refactoring mmx2/mmxext YASM code with cpuflags will force renames.
So switching to a consistent naming scheme beforehand is sensible.
The name "mmxext" is more official and widespread and also the name
of the CPU flag, as reported e.g. by the Linux kernel.
|
|
|
|
|
| |
The yadif mmx optimizations contain the pmaxsw and pmaxub mmxext
instructions, causing sigills on CPUs that do not support mmxext.
|
|
|
|
|
| |
This allows compiling this code using compilers that do not understand
gcc-style inline assembly.
|
|
|
|
|
|
|
| |
These functions are defined conditionally so any uses need to have
preprocessor guards.
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
| |
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
| |
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
| |
|
| |
|
|
|
|
|
| |
Actually I gave permission for LGPL long ago, but the original import
failed to update the license header.
|
|
|
|
|
|
|
| |
Fixes issue2272.
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
|
|
|
| |
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
| |
Signed-off-by: Janne Grunau <janne-ffmpeg@jannau.net>
|