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authorHenrik Gramner <henrik@gramner.com>2013-09-11 17:49:29 +0200
committerDerek Buitenhuis <derek.buitenhuis@gmail.com>2013-10-07 06:27:38 -0400
commit3e2fa991db7ef172579422accd61624d52777e5a (patch)
treeda09818dc3b7c1c4c01e47944ad758a9bba106be /libavutil/x86
parent71155665414b551ad350622d5abed20e58371fbf (diff)
x86inc: remove misaligned cpu flag
Prevents a crash if the misaligned exception mask bit is cleared for some reason. Misaligned SSE functions are only used on AMD Phenom CPUs and the benefit is miniscule. They also require modifying the MXCSR control register and by removing those functions we can get rid of that complexity altogether. Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
Diffstat (limited to 'libavutil/x86')
-rw-r--r--libavutil/x86/x86inc.asm9
1 files changed, 4 insertions, 5 deletions
diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
index 6419eef8e3..1aedb3b651 100644
--- a/libavutil/x86/x86inc.asm
+++ b/libavutil/x86/x86inc.asm
@@ -757,11 +757,10 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
%assign cpuflags_cache64 (1<<17)
%assign cpuflags_slowctz (1<<18)
%assign cpuflags_lzcnt (1<<19)
-%assign cpuflags_misalign (1<<20)
-%assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
-%assign cpuflags_atom (1<<22)
-%assign cpuflags_bmi1 (1<<23)|cpuflags_lzcnt
-%assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1
+%assign cpuflags_aligned (1<<20) ; not a cpu feature, but a function variant
+%assign cpuflags_atom (1<<21)
+%assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
+%assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
%define cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
%define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))