mips: intreadwrite: fix inline asm for gcc 4.8

Just like gcc 4.6 and later on ARM, gcc 4.8 on MIPS generates
inefficient code when a known-unaligned location is used as a
memory input operand.  This applies the same fix as has been
previously done to the ARM version of the code.

Signed-off-by: Mans Rullgard <mans@mansr.com>

1 files changed, 5 insertions, 2 deletions

diff --git a/libavutil/mips/intreadwrite.h b/libavutil/mips/intreadwrite.h
index d0c558fb81..4dabbe6819 100644
--- a/libavutil/mips/intreadwrite.h
+++ b/libavutil/mips/intreadwrite.h
@@ -29,12 +29,15 @@
 #define AV_RN32 AV_RN32
 static av_always_inline uint32_t AV_RN32(const void *p)
 {
+    struct __attribute__((packed)) u32 { uint32_t v; };
+    const uint8_t *q = p;
+    const struct u32 *pl = (const struct u32 *)(q + 3 * !HAVE_BIGENDIAN);
+    const struct u32 *pr = (const struct u32 *)(q + 3 *  HAVE_BIGENDIAN);
     uint32_t v;
     __asm__ ("lwl %0, %1  \n\t"
              "lwr %0, %2  \n\t"
              : "=&r"(v)
-             : "m"(*(const uint32_t *)((const uint8_t *)p+3*!HAVE_BIGENDIAN)),
-               "m"(*(const uint32_t *)((const uint8_t *)p+3*HAVE_BIGENDIAN)));
+             : "m"(*pl), "m"(*pr));
     return v;
 }