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authorMans Rullgard <mans@mansr.com>2011-05-27 21:43:15 +0100
committerMans Rullgard <mans@mansr.com>2011-05-28 15:00:17 +0100
commita84f82560e3fa6aa41de64b0a5b75d1d607599aa (patch)
tree69d8eba68d4f18590a09f59274dd33da437202d9 /libavutil/arm/intmath.h
parent7f7726c7a23f8ca9d8cd5d2511356d724d4284a3 (diff)
ARM: improve FASTDIV asm
This uses one register less. Also add missing "cc" clobber. Signed-off-by: Mans Rullgard <mans@mansr.com>
Diffstat (limited to 'libavutil/arm/intmath.h')
-rw-r--r--libavutil/arm/intmath.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/libavutil/arm/intmath.h b/libavutil/arm/intmath.h
index cc3de90f04..4340b59075 100644
--- a/libavutil/arm/intmath.h
+++ b/libavutil/arm/intmath.h
@@ -33,12 +33,12 @@
#define FASTDIV FASTDIV
static av_always_inline av_const int FASTDIV(int a, int b)
{
- int r, t;
- __asm__ ("cmp %3, #2 \n\t"
- "ldr %1, [%4, %3, lsl #2] \n\t"
- "lsrle %0, %2, #1 \n\t"
- "smmulgt %0, %1, %2 \n\t"
- : "=&r"(r), "=&r"(t) : "r"(a), "r"(b), "r"(ff_inverse));
+ int r;
+ __asm__ ("cmp %2, #2 \n\t"
+ "ldr %0, [%3, %2, lsl #2] \n\t"
+ "lsrle %0, %1, #1 \n\t"
+ "smmulgt %0, %0, %1 \n\t"
+ : "=&r"(r) : "r"(a), "r"(b), "r"(ff_inverse) : "cc");
return r;
}