diff options
author | Ronald S. Bultje <rsbultje@gmail.com> | 2013-10-24 06:54:32 -0400 |
---|---|---|
committer | Janne Grunau <janne-libav@jannau.net> | 2014-01-30 15:30:01 +0100 |
commit | 51daafb02eaf96e0743a37ce95a7f5d02c1fa3c2 (patch) | |
tree | 2882850ccc912fab642661637d91814954d6e21a /libavcodec/x86/videodsp_init.c | |
parent | 64ba831da99c5526b21d510397b449742e92961e (diff) |
x86: videodsp: Properly mark sse2 instructions in emulated_edge_mc as such.
Should fix crashes or corrupt output on pre-SSE2 CPUs when they were
using SSE2-code (e.g. AMD Athlon XP 2400+ or Intel Pentium III) in
hfix or hvar single-edge (left/right) extension functions.
Signed-off-by: Janne Grunau <janne-libav@jannau.net>
Diffstat (limited to 'libavcodec/x86/videodsp_init.c')
-rw-r--r-- | libavcodec/x86/videodsp_init.c | 37 |
1 files changed, 27 insertions, 10 deletions
diff --git a/libavcodec/x86/videodsp_init.c b/libavcodec/x86/videodsp_init.c index 79d980194c..8ee837096a 100644 --- a/libavcodec/x86/videodsp_init.c +++ b/libavcodec/x86/videodsp_init.c @@ -115,17 +115,17 @@ static emu_edge_hfix_func *hfixtbl_mmx[11] = { }; #endif extern emu_edge_hvar_func ff_emu_edge_hvar_mmx; -extern emu_edge_hfix_func ff_emu_edge_hfix16_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix18_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix20_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix22_sse; -static emu_edge_hfix_func *hfixtbl_sse[11] = { +extern emu_edge_hfix_func ff_emu_edge_hfix16_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix18_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix20_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix22_sse2; +static emu_edge_hfix_func *hfixtbl_sse2[11] = { ff_emu_edge_hfix2_mmx, ff_emu_edge_hfix4_mmx, ff_emu_edge_hfix6_mmx, ff_emu_edge_hfix8_mmx, ff_emu_edge_hfix10_mmx, ff_emu_edge_hfix12_mmx, - ff_emu_edge_hfix14_mmx, ff_emu_edge_hfix16_sse, ff_emu_edge_hfix18_sse, - ff_emu_edge_hfix20_sse, ff_emu_edge_hfix22_sse + ff_emu_edge_hfix14_mmx, ff_emu_edge_hfix16_sse2, ff_emu_edge_hfix18_sse2, + ff_emu_edge_hfix20_sse2, ff_emu_edge_hfix22_sse2 }; -extern emu_edge_hvar_func ff_emu_edge_hvar_sse; +extern emu_edge_hvar_func ff_emu_edge_hvar_sse2; static av_always_inline void emulated_edge_mc(uint8_t *dst, const uint8_t *src, ptrdiff_t dst_stride, @@ -211,7 +211,6 @@ static av_noinline void emulated_edge_mc_mmx(uint8_t *buf, const uint8_t *src, src_x, src_y, w, h, vfixtbl_mmx, &ff_emu_edge_vvar_mmx, hfixtbl_mmx, &ff_emu_edge_hvar_mmx); } -#endif static av_noinline void emulated_edge_mc_sse(uint8_t * buf,const uint8_t *src, ptrdiff_t buf_stride, @@ -221,7 +220,20 @@ static av_noinline void emulated_edge_mc_sse(uint8_t * buf,const uint8_t *src, { emulated_edge_mc(buf, src, buf_stride, src_stride, block_w, block_h, src_x, src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse, - hfixtbl_sse, &ff_emu_edge_hvar_sse); + hfixtbl_mmx, &ff_emu_edge_hvar_mmx); +} +#endif + +static av_noinline void emulated_edge_mc_sse2(uint8_t *buf, const uint8_t *src, + ptrdiff_t buf_stride, + ptrdiff_t src_stride, + int block_w, int block_h, + int src_x, int src_y, int w, + int h) +{ + emulated_edge_mc(buf, src, buf_stride, src_stride, block_w, block_h, src_x, + src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse, + hfixtbl_sse2, &ff_emu_edge_hvar_sse2); } #endif /* HAVE_YASM */ @@ -244,8 +256,13 @@ av_cold void ff_videodsp_init_x86(VideoDSPContext *ctx, int bpc) if (EXTERNAL_MMXEXT(cpu_flags)) { ctx->prefetch = ff_prefetch_mmxext; } +#if ARCH_X86_32 if (EXTERNAL_SSE(cpu_flags) && bpc <= 8) { ctx->emulated_edge_mc = emulated_edge_mc_sse; } +#endif /* ARCH_X86_32 */ + if (EXTERNAL_SSE2(cpu_flags) && bpc <= 8) { + ctx->emulated_edge_mc = emulated_edge_mc_sse2; + } #endif /* HAVE_YASM */ } |