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| author | Shiyou Yin <yinshiyou-hf@loongson.cn> | 2019-07-17 17:35:00 +0800 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2019-07-19 01:23:23 +0200 |
| commit | 153c60752558369b98dce0b7a0ca7acc687fa630 (patch) | |
| tree | b1dc51fc656ac92b1ac3f377ee75c6808bec0369 /libavcodec/mips/hevc_idct_msa.c | |
| parent | 00ed04d6149691a9abf486b2f88172fd6341d801 (diff) | |
avutil/mips: refactor msa load and store macros.
Replace STnxm_UB and LDnxm_SH with new macros ST_{H/W/D}{1/2/4/8}.
The old macros are difficult to use because they don't follow the same parameter passing rules.
Changing details as following:
1. remove LD4x4_SH.
2. replace ST2x4_UB with ST_H4.
3. replace ST4x2_UB with ST_W2.
4. replace ST4x4_UB with ST_W4.
5. replace ST4x8_UB with ST_W8.
6. replace ST6x4_UB with ST_W2 and ST_H2.
7. replace ST8x1_UB with ST_D1.
8. replace ST8x2_UB with ST_D2.
9. replace ST8x4_UB with ST_D4.
10. replace ST8x8_UB with ST_D8.
11. replace ST12x4_UB with ST_D4 and ST_W4.
Examples of new macro: ST_H4(in, idx0, idx1, idx2, idx3, pdst, stride)
ST_H4 store four half-word elements in vector 'in' to pdst with stride.
About the macro name:
1) 'ST' means store operation.
2) 'H/W/D' means type of vector element is 'half-word/word/double-word'.
3) Number '1/2/4/8' means how many elements will be stored.
About the macro parameter:
1) 'in0, in1...' 128-bits vector.
2) 'idx0, idx1...' elements index.
3) 'pdst' destination pointer to store to
4) 'stride' stride of each store operation.
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'libavcodec/mips/hevc_idct_msa.c')
| -rw-r--r-- | libavcodec/mips/hevc_idct_msa.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/libavcodec/mips/hevc_idct_msa.c b/libavcodec/mips/hevc_idct_msa.c index 09431196bb..b14aec95eb 100644 --- a/libavcodec/mips/hevc_idct_msa.c +++ b/libavcodec/mips/hevc_idct_msa.c @@ -727,7 +727,7 @@ static void hevc_addblk_4x4_msa(int16_t *coeffs, uint8_t *dst, int32_t stride) ADD2(dst_r0, in0, dst_l0, in1, dst_r0, dst_l0); CLIP_SH2_0_255(dst_r0, dst_l0); dst_vec = (v4i32) __msa_pckev_b((v16i8) dst_l0, (v16i8) dst_r0); - ST4x4_UB(dst_vec, dst_vec, 0, 1, 2, 3, dst, stride); + ST_W4(dst_vec, 0, 1, 2, 3, dst, stride); } static void hevc_addblk_8x8_msa(int16_t *coeffs, uint8_t *dst, int32_t stride) @@ -752,8 +752,7 @@ static void hevc_addblk_8x8_msa(int16_t *coeffs, uint8_t *dst, int32_t stride) dst_r0, dst_l0, dst_r1, dst_l1); CLIP_SH4_0_255(dst_r0, dst_l0, dst_r1, dst_l1); PCKEV_B2_SH(dst_l0, dst_r0, dst_l1, dst_r1, dst_r0, dst_r1); - ST8x4_UB(dst_r0, dst_r1, dst, stride); - dst += (4 * stride); + ST_D4(dst_r0, dst_r1, 0, 1, 0, 1, dst, stride); LD4(temp_dst, stride, dst0, dst1, dst2, dst3); INSERT_D2_SD(dst0, dst1, dst_vec0); @@ -764,7 +763,7 @@ static void hevc_addblk_8x8_msa(int16_t *coeffs, uint8_t *dst, int32_t stride) dst_r0, dst_l0, dst_r1, dst_l1); CLIP_SH4_0_255(dst_r0, dst_l0, dst_r1, dst_l1); PCKEV_B2_SH(dst_l0, dst_r0, dst_l1, dst_r1, dst_r0, dst_r1); - ST8x4_UB(dst_r0, dst_r1, dst, stride); + ST_D4(dst_r0, dst_r1, 0, 1, 0, 1, dst + 4 * stride, stride); } static void hevc_addblk_16x16_msa(int16_t *coeffs, uint8_t *dst, int32_t stride) |