diff options
| author | Vicente Olivert Riera <Vincent.Riera@imgtec.com> | 2016-02-24 16:38:22 +0000 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2016-03-09 20:05:04 +0100 |
| commit | ad16eff64ba78d8dc98a8324640025c7cb2857f3 (patch) | |
| tree | bec1d6bfbf92ce1a90c645d5dad006a6f9dea48d /libavcodec/mips/aacsbr_mips.c | |
| parent | a62d768894709b3cbdda88f558accf0099c08215 (diff) | |
mips: add support for R6
Understanding the mips32r6 and mips64r6 ISAs in the configure script is
not enough. In order to have full support for MIPS R6 in FFmpeg we need
to be able to build it, and for that we need to make sure we don't use
incompatible assembler code which makes the build fail. Ifdefing the
offending code is sufficient to fix the problem.
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'libavcodec/mips/aacsbr_mips.c')
| -rw-r--r-- | libavcodec/mips/aacsbr_mips.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/libavcodec/mips/aacsbr_mips.c b/libavcodec/mips/aacsbr_mips.c index e478290e47..56aa4e8682 100644 --- a/libavcodec/mips/aacsbr_mips.c +++ b/libavcodec/mips/aacsbr_mips.c @@ -311,6 +311,7 @@ static int sbr_x_gen_mips(SpectralBandReplication *sbr, float X[2][38][64], } #if HAVE_MIPSFPU +#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 static void sbr_hf_assemble_mips(float Y1[38][64][2], const float X_high[64][40][2], SpectralBandReplication *sbr, SBRData *ch_data, @@ -603,6 +604,7 @@ static void sbr_hf_inverse_filter_mips(SBRDSPContext *dsp, } } } +#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */ #endif /* HAVE_MIPSFPU */ #endif /* HAVE_INLINE_ASM */ @@ -612,8 +614,10 @@ void ff_aacsbr_func_ptr_init_mips(AACSBRContext *c) c->sbr_lf_gen = sbr_lf_gen_mips; c->sbr_x_gen = sbr_x_gen_mips; #if HAVE_MIPSFPU +#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6 c->sbr_hf_inverse_filter = sbr_hf_inverse_filter_mips; c->sbr_hf_assemble = sbr_hf_assemble_mips; +#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */ #endif /* HAVE_MIPSFPU */ #endif /* HAVE_INLINE_ASM */ } |