From 802b82837b5b37b7c76ee807939bbffe76f17fdd Mon Sep 17 00:00:00 2001 From: eschnett Date: Thu, 25 Aug 2011 17:40:05 +0000 Subject: Suggest asm statements to support SSE4a with Intel compilers. Indent vector architecture definitions. git-svn-id: https://svn.cct.lsu.edu/repos/numrel/LSUThorns/Vectors/trunk@30 105869f7-3296-0410-a4ea-f4349344b45a --- src/vectors-4-SSE.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/vectors-4-SSE.h') diff --git a/src/vectors-4-SSE.h b/src/vectors-4-SSE.h index 2f55183..dbf0cce 100644 --- a/src/vectors-4-SSE.h +++ b/src/vectors-4-SSE.h @@ -21,11 +21,11 @@ #ifdef __SSE4_1__ -#define vec4_architecture "SSE4.1 (32-bit precision)" +# define vec4_architecture "SSE4.1 (32-bit precision)" #elif defined(__SSE4A__) -#define vec4_architecture "SSE4A (32-bit precision)" +# define vec4_architecture "SSE4A (32-bit precision)" #else -#define vec4_architecture "SSE (32-bit precision)" +# define vec4_architecture "SSE (32-bit precision)" #endif // Vector type corresponding to CCTK_REAL -- cgit v1.2.3