From eba586b0d9f0546c7c9c965edb71e7b29721217d Mon Sep 17 00:00:00 2001 From: Justin Ruggles Date: Mon, 21 Mar 2011 23:32:40 -0400 Subject: Add a CPU flag for the Atom processor. The Atom has SSSE3 support, which is useful in many cases, but sometimes the SSSE3 version is slower than the SSE2 equivalent on the Atom, but is generally faster on other processors supporting SSSE3. This flag allows for selectively disabling certain SSSE3 functions on the Atom. --- libavutil/x86/cpu.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'libavutil/x86/cpu.c') diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c index c11956d3c3..4bc56912b5 100644 --- a/libavutil/x86/cpu.c +++ b/libavutil/x86/cpu.c @@ -135,8 +135,8 @@ int ff_get_cpu_flags_x86(void) } } - if (!strncmp(vendor.c, "GenuineIntel", 12) && - family == 6 && (model == 9 || model == 13 || model == 14)) { + if (!strncmp(vendor.c, "GenuineIntel", 12)) { + if (family == 6 && (model == 9 || model == 13 || model == 14)) { /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah") * theoretically support sse2, but it's usually slower than mmx, * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and @@ -145,6 +145,14 @@ int ff_get_cpu_flags_x86(void) * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */ if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2; if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3; + } + /* The Atom processor has SSSE3 support, which is useful in many cases, + * but sometimes the SSSE3 version is slower than the SSE2 equivalent + * on the Atom, but is generally faster on other processors supporting + * SSSE3. This flag allows for selectively disabling certain SSSE3 + * functions on the Atom. */ + if (family == 6 && model == 28) + rval |= AV_CPU_FLAG_ATOM; } return rval; -- cgit v1.2.3 From 45ed82255025a200beae3b56a84bee20aad41465 Mon Sep 17 00:00:00 2001 From: Justin Ruggles Date: Mon, 21 Mar 2011 23:33:00 -0400 Subject: cosmetics: indentation --- libavutil/x86/cpu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'libavutil/x86/cpu.c') diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c index 4bc56912b5..78aeadf0a1 100644 --- a/libavutil/x86/cpu.c +++ b/libavutil/x86/cpu.c @@ -137,14 +137,14 @@ int ff_get_cpu_flags_x86(void) if (!strncmp(vendor.c, "GenuineIntel", 12)) { if (family == 6 && (model == 9 || model == 13 || model == 14)) { - /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah") - * theoretically support sse2, but it's usually slower than mmx, - * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and - * AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless - * explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same - * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */ - if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2; - if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3; + /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah") + * theoretically support sse2, but it's usually slower than mmx, + * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and + * AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless + * explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same + * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */ + if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2; + if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3; } /* The Atom processor has SSSE3 support, which is useful in many cases, * but sometimes the SSSE3 version is slower than the SSE2 equivalent -- cgit v1.2.3