| Commit message (Collapse) | Author | Age |
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An alpha specifier outside the valid range results in a conversion from
double to long with undefined result. Range-checking the double and
only converting it after it passes avoids this.
Fixes fate-parseutils errors on some systems.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Anonymous structs cannot be forward declared and have no benefit.
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This guarantees stable output for comparing test results.
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ff_get_cpu_flags_x86() requires cpuid(), which is conditionally defined
elsewhere in the file. Surrounding the function body with ifdefs allows
building even when cpuid is not defined. An empty cpuflags mask is
returned in this case.
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Now that there is CPU detection in YASM, there will always be one of
inline or external assembly enabled, which obviates the need to fall
back on CPU detection through compiler intrinsics.
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This allows detecting CPU features with builds that have neither
gcc inline assembly nor the right compiler intrinsics enabled.
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Right now the buffer is zeroed, which does not represent silence for U8(P).
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Based on test code by: Giorgio Vazzana <mywing81@gmail.com>
Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Based on a patch by Michael Niedermayer.
Signed-off-by: Martin Storsjö <martin@martin.st>
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There are cases where strncpy() does exactly what is required.
A blanket ban forces more convoluted solutions to be used in those
cases and has been a cause of bugs.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Test inplace ECB, normal CBC and inplace CBC encryption/decryption.
Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Some old assemblers still in use do not support named tags.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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This function causes several versions of armcc to miscompile code,
and the performance impact is small.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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All our ARM asm preserves alignment so setting this attribute
in a common location is simpler. This removes numerous warnings
when linking with armcc.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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LDR with register offset and PC as base register is not available in
the Thumb instruction set so the addition must be done separately.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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statements
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The Apple assembler refuses to assemble the 3-operand form
in Thumb2 even though it is valid syntax.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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When building Thumb2 code, the end of a function, where the PIC
offsets are placed, need not be aligned. Although the values
are only accessed with instructions allowing unaligned addresses,
keeping them aligned is preferable.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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This allows using a 16-bit opcode when generating Thumb2 code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Can be used by DTS-HD, TrueHD and E-AC-3, among others.
Signed-off-by: Justin Ruggles <justin.ruggles@gmail.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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This separates code relying on inline from that relying on external
assembly and fixes instances where the coalesced check was incorrect.
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The SWAP macro does not work for explicit xmm/ymm usage, so instead just move
the scalar value from xmm2 to xmm0.
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actual code.
Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Also mention this change in APIchanges.
Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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13% faster on penryn, 16% on sandybridge, 15% on bulldozer
Not simd; a compiler should have generated this, but gcc didn't.
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Double does not have enough precision to represent all int64 numbers
exactly.
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GCC 4.3 and later do the right thing with the plain C code. Earlier
versions in 32-bit mode generate one extra instruction, needlessly
zeroing what would be the high half of the shifted value. At least
two gcc configurations miscompile the inline asm in some situations.
In 64-bit mode, all gcc versions generate imul r64, r64 followed by
shr. On Intel i7 and later, this imul is faster 32-bit mul. On
older Intel and all AMD, it is slightly slower. On Atom it is much
slower.
Considering where the FASTDIV macro is used, any overall negative
performance impact of this change should be negligible. If anyone
cares, they should file a bug against gcc and get the instruction
selection fixed.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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There is no point in having the user disable any fastdiv macros.
Besides the condition implementation was broken and only disabled
the C implementation, but no platform specific assembly versions.
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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Signed-off-by: Martin Storsjö <martin@martin.st>
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This avoids having the compiler redundantly mask the values to
the smaller size.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Fixed-point audio codecs often use saturating arithmetic, and
special instructions for these operations are common.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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