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* x86inc: Correctly warn on use of SSE2 instructions in SSE functionsChristophe Gisquet2015-02-17
| | | | | | | | SSE2 instructions that are XMM-implementations of pre-existing MMX/MMX2 instructions did not issue warnings when used in SSE functions. Handle it by also checking the register type when such instructions are used. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x86: lavu/x264asm: fix ymm register instantiationChristophe Gisquet2015-02-04
| | | | | | | | This mimicks what is done for the other instruction sets. Tested-by: James Almer <jamrial@gmail.com> Tested-by: Mickaël Raulet <mraulet@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* lavu/x86/x86inc: deprecate INIT_AVXJames Darnley2015-02-02
| | | | | | The same can be done with INIT_XMM avx Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x264asm: warn when inappropriate instruction used in function with specified ↵Anton Mitrofanov2015-02-02
| | | | | | | cpuflags Requested-by: Christophe Gisquet <christophe.gisquet@gmail.com> Requested-by: "Ronald S. Bultje" <rsbultje@gmail.com>
* x86/swr: add SSE2/AVX pack_8ch functionsJames Almer2014-12-30
| | | | | | Reviewed-by: Michael Niedermayer <michaelni@gmx.at> Reviewed-by: Ronald S. Bultje <rsbultje@gmail.com> Signed-off-by: James Almer <jamrial@gmail.com>
* v210enc: Add SIMD optimised 8-bit and 10-bit encodersKieran Kunhya2014-11-26
| | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* avutil/lls: Make unchanged function arguments constMichael Niedermayer2014-09-28
| | | | | Reviewed-by: Paul B Mahol <onemda@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* avutil/x86/cpu: fix cpuid sub-leaf selectionlvqcl2014-09-27
| | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x86inc: Make INIT_CPUFLAGS support an arbitrary number of cpuflagsHenrik Gramner2014-09-05
| | | | | | Previously there was a limit of two cpuflags. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x86inc: Make ym# behave the same way as xm#Henrik Gramner2014-09-05
| | | | | | This makes more sense for future implementations of templates with zmm registers. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x86inc: free up variable name "n" in global namespaceLoren Merritt2014-09-05
| | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* avutil/pixelutils: faster pixelutils_sad_16x16Clément Bœsch2014-08-23
| | | | | | 501 to 439 decicycles. See 45c7f3997ea11c3d1007b2126b1c0049a8c27105.
* avutil/pixelutils: faster pixelutils_sad_[au]_16x16Clément Bœsch2014-08-23
| | | | | | | | | | ~560 → ~500 decicycles This is following the comments from Michael in https://ffmpeg.org/pipermail/ffmpeg-devel/2014-August/160599.html Using 2 registers for accumulator didn't help. On the other hand, some re-ordering between the movs and psadbw allowed going ~538 to ~500.
* drop LLS1, rename LLS2 to LLSMichael Niedermayer2014-08-09
| | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* avutil: add pixelutils APIClément Bœsch2014-08-05
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* x86/hevc_deblock: improve 8bit transpose store macrosJames Almer2014-08-03
| | | | | | | Up to four instructions less depending on function and instruction set. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* x86/hevc_idct: replace old and unused idct functionsJames Almer2014-07-26
| | | | | | | | | | | | | | | | | | | | | | Only 8-bit and 10-bit idct_dc() functions are included (adding others should be trivial). Benchmarks on an Intel Core i5-4200U: idct8x8_dc SSE2 MMXEXT C cycles 22 26 57 idct16x16_dc AVX2 SSE2 C cycles 27 32 249 idct32x32_dc AVX2 SSE2 C cycles 62 126 1375 Signed-off-by: James Almer <jamrial@gmail.com> Reviewed-by: Mickaël Raulet <mraulet@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* Merge commit '79793f833784121d574454af4871866576c0749d'Michael Niedermayer2014-07-01
|\ | | | | | | | | | | | | * commit '79793f833784121d574454af4871866576c0749d': Update Fiona's name in copyright statements. Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * Update Fiona's name in copyright statements.Diego Biurrun2014-07-01
| |
* | x86util: add and use RSHIFT/LSHIFT macrosChristophe Gisquet2014-06-15
| | | | | | | | | | | | | | Those macros take a byte number as shift argument, as this argument differs between MMX and SSE2 instructions. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: add missing femmsJames Almer2014-06-08
| | | | | | | | | | | | | | | | It was lost during the port. Should fix fate on 3dnowext machines. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: port vector_fmul_window to yasmJames Almer2014-06-08
| | | | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/vp9: inital AVX2 intra_predJames Almer2014-06-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tos3k-vp9-b10000.webm on a Core i5-4200U @1.6GHz 1219 decicycles in ff_vp9_ipred_dc_32x32_ssse3, 131070 runs, 2 skips 439 decicycles in ff_vp9_ipred_dc_32x32_avx2, 131070 runs, 2 skips 3570 decicycles in ff_vp9_ipred_dc_top_32x32_ssse3, 4096 runs, 0 skips 2494 decicycles in ff_vp9_ipred_dc_top_32x32_avx2, 4096 runs, 0 skips 1419 decicycles in ff_vp9_ipred_dc_left_32x32_ssse3, 16384 runs, 0 skips 717 decicycles in ff_vp9_ipred_dc_left_32x32_avx2, 16384 runs, 0 skips 2737 decicycles in ff_vp9_ipred_tm_32x32_avx, 1024 runs, 0 skips 2088 decicycles in ff_vp9_ipred_tm_32x32_avx2, 1024 runs, 0 skips 3090 decicycles in ff_vp9_ipred_v_32x32_avx, 512 runs, 0 skips 2226 decicycles in ff_vp9_ipred_v_32x32_avx2, 512 runs, 0 skips 1565 decicycles in ff_vp9_ipred_h_32x32_avx, 1024 runs, 0 skips 922 decicycles in ff_vp9_ipred_h_32x32_avx2, 1024 runs, 0 skips Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: hpeldsp: better factorizationChristophe Gisquet2014-05-29
| | | | | | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/dsputilenc: implement SSE2 versions of pix_{sum16, norm1}James Almer2014-05-28
| | | | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | inline asm: fix arrays as named constraints.Matt Oliver2014-05-07
| | | | | | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: remove duplicated code from vector_dmul_scalarJames Almer2014-04-19
| | | | | | | | | | | | | | | | Use the xm# and ym# aliases as they remain in sync with m# after a SWAP. No actual changes to the assembly. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: move horizontal add macros to x86utilJames Almer2014-04-17
| | | | | | | | | | | | | | | | | | Also port relevant AVX2/XOP optimizations from x264 with permission to relicense to LGPL from the corresponding authors Signed-off-by: James Almer <jamrial@gmail.com> Reviewed-by: "Ronald S. Bultje" <rsbultje@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: unroll loop in vector_fmac_scalarJames Almer2014-04-16
| | | | | | | | | | | | | | | | ~6% faster SSE2 performance. AVX/FMA3 are unaffected. Signed-off-by: James Almer <jamrial@gmail.com> Reviewed-by: Christophe Gisquet <christophe.gisquet@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: use SWAP in vector_fmac_scalar Win64James Almer2014-04-16
| | | | | | | | | | | | | | The mova is unnecessary Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/cpu: check for OS support before enabling AVX2James Almer2014-03-25
| | | | | | | | | | | | | | AV_CPU_FLAG_AVX is enabled at this point only if there's OS support. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | Automatically change MANGLE() into named inline asm operands when direct ↵Matt Oliver2014-03-18
| | | | | | | | | | | | | | | | symbol reference in inline asm are not supported. This is part of the patch-set for intel C inline asm on windows support Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86/float_dsp: add ff_vector_{fmul_add, fmac_scalar}_fma3James Almer2014-03-13
| | | | | | | | | | | | | | ~7% faster than AVX Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | avutil/timer: Fix units for x86 after c708b5403346255ea5adc776645616cc7c61f078Michael Niedermayer2014-03-09
| | | | | | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: Move XOP emulation to x86utilJames Almer2014-02-24
| | | | | | | | | | | | | | | | | | | | | | We need the emulation to support the cases where the first argument is the same as the fourth. To achieve this a fifth argument working as a temporary may be needed. Emulation that doesn't obey the original instruction semantics can't be in x86inc. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | Merge remote-tracking branch 'qatar/master'Michael Niedermayer2014-02-23
|\| | | | | | | | | | | | | | | | | | | | | * qatar/master: x86: add detection for Bit Manipulation Instruction sets Conflicts: libavutil/x86/cpu.c See: 0bc3de19ffe296254f214dc7615e624d8e401bcb Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * x86: add detection for Bit Manipulation Instruction setsJames Almer2014-02-23
| | | | | | | | | | | | Based on x264 code Signed-off-by: James Almer <jamrial@gmail.com>
* | Merge commit '1b932eb1508f550fac9e911923a0383efda53aa3'Michael Niedermayer2014-02-23
|\| | | | | | | | | | | | | | | | | | | | | | | | | * commit '1b932eb1508f550fac9e911923a0383efda53aa3': x86: add detection for FMA3 instruction set Conflicts: configure libavutil/cpu.h libavutil/x86/cpu.c See: a2af8eddab75f1eac712411e4dde89823c0845e8 Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * x86: add detection for FMA3 instruction setJames Almer2014-02-23
| | | | | | | | | | | | Based on x264 code Signed-off-by: James Almer <jamrial@gmail.com>
| * x86: add missing XOP checks and macrosJames Almer2014-02-23
| | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com>
| * x86: float dsp: unroll SSE versionsChristophe Gisquet2014-02-20
| | | | | | | | | | | | | | | | | | | | vector_fmul and vector_fmac_scalar are guaranteed that they can process in batch of 16 elements, but their SSE versions only does 8 at a time. Therefore, unroll them a bit. 299 to 261c for 256 elements in vector_fmac_scalar on Arrandale/Win64. Signed-off-by: Janne Grunau <janne-libav@jannau.net>
| * x86inc: Speed up assembling with YasmLoren Merritt2014-01-26
| | | | | | | | | | | | | | Work around Yasm's inefficiency with handling large numbers of variables in the global scope. Signed-off-by: Diego Biurrun <diego@biurrun.de>
* | x86: add detection for Bit Manipulation Instruction setsJames Almer2014-02-22
| | | | | | | | | | | | | | Based on x264 code Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: add detection for FMA3 instruction setJames Almer2014-02-22
| | | | | | | | | | | | | | Based on x264 code Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: float dsp: unroll SSE versionsChristophe Gisquet2014-02-15
| | | | | | | | | | | | | | | | | | | | vector_fmul and vector_fmac_scalar are guaranteed that they can process in batch of 16 elements, but their SSE versions only does 8 at a time. Therefore, unroll them a bit. 299 to 261c for 256 elements in vector_fmac_scalar on Arrandale/Win64. Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86inc: Extend FMA_INSTR functionalityJames Almer2014-02-13
| | | | | | | | | | | | | | | | | | | | Support the cases where the first and last operand of the XOP instruction are the same. Also add vpmacsdql emulation. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86: add missing XOP checks and macrosJames Almer2014-02-11
| | | | | | | | | | Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | x86inc: speed up compilation with yasmLoren Merritt2014-01-18
| | | | | | | | | | Work around yasm's inefficiency with handling large numbers of variables in the global scope.
* | rename new lls code to lls2 to avoid conflict with the old which has a ↵Michael Niedermayer2013-11-17
| | | | | | | | | | | | | | | | different ABI also remove failed attempt at a compatibility layer, the code simply cannot work Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | avutil: rename lls to lls2Michael Niedermayer2013-11-17
| | | | | | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
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