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* x86inc: Drop SECTION_TEXT macroHenrik Gramner2015-08-11
| | | | | | | The .text section is already 16-byte aligned by default on all supported platforms so `SECTION_TEXT` isn't any different from `SECTION .text`. Signed-off-by: Anton Khirnov <anton@khirnov.net>
* x86: Make function prototype comments in assembly code consistentDiego Biurrun2014-03-13
| | | | This helps grepping for functions, among other things.
* x86: sbrdsp: implement SSE2 qmf_pre_shuffleChristophe Gisquet2013-05-10
| | | | | | | From 253 to 51 cycles on Arrandale and Win64. 44 cycles on SandyBridge. Signed-off-by: Anton Khirnov <anton@khirnov.net>
* x86: sbrdsp: Implement SSE2 qmf_deint_bflyChristophe Gisquet2013-05-03
| | | | | | | | | | Sandybridge: 47 cycles Having a loop counter is a 7 cycle gain. Unrolling is another 7 cycle gain. Working in reverse scan is another 6 cycles. Signed-off-by: Diego Biurrun <diego@biurrun.de>
* x86: sbrdsp: Implement SSE neg_odd_64Christophe Gisquet2013-04-05
| | | | | | | | | | Timing on Arrandale: C SSE Win32: 57 44 Win64: 47 38 Unrolling and not storing mask both save some cycles. Signed-off-by: Diego Biurrun <diego@biurrun.de>
* x86: sbrdsp: Implement SSE qmf_post_shuffleChristophe Gisquet2013-01-06
| | | | | | 255 to 174 cycles on Arrandale / Win64. Unrolling yields no gain. Signed-off-by: Diego Biurrun <diego@biurrun.de>
* x86: sbrdsp: Implement SSE sum64x5Christophe Gisquet2013-01-06
| | | | | | 698 to 174 cycles on Arrandale. Unrolling is a 6 cycles gain. Signed-off-by: Diego Biurrun <diego@biurrun.de>
* SBR DSP x86: implement SSE sbr_hf_genChristophe Gisquet2012-12-07
| | | | | | | | | | | | Start and end index are multiple of 2, therefore guaranteeing aligned access. Also, this allows to generate 4 floats per loop, keeping the alignment all along. Timing: - 32 bits: 326c -> 172c - 64 bits: 323c -> 156c Signed-off-by: Diego Biurrun <diego@biurrun.de>
* x86: yasm: Use complete source path for macro helper %includesDiego Biurrun2012-10-31
| | | | | This is more consistent with the way we handle C #includes and it simplifies the build system.
* x86: include x86inc.asm in x86util.asmDiego Biurrun2012-10-31
| | | | This is necessary to allow refactoring some x86util macros with cpuflags.
* dsputil x86: use SSE float instruction instead of SSE2 integer equivalentChristophe GISQUET2012-04-04
| | | | | | All the more required since the users are pure SSE functions. Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
* aacsbr: handle m_max values smaller than 4.Ronald S. Bultje2012-03-23
| | | | | | | | Prevents a signflip in the counter, and a subsequent crash because of overreads/overwrites. Found-by: Mateusz "j00ru" Jurczyk and Gynvael Coldwind CC: libav-stable@libav.org
* sbrdsp.asm: convert all instructions to float/SSE ones.Reimar Döffinger2012-03-07
| | | | | | | | | | | Since the values are floats, using the float operations makes sense, improves performance on some CPUs and makes the code SSE compatible instead of needing SSE2. Based on suggestion by Jason. Signed-off-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de> Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
* SBR DSP: fix SSE code to not use SSE2 instructions.Reimar Döffinger2012-03-06
| | | | | | | | movq from SSE register _to_ memory is an SSE2 instruction. Use the SSE movlps function instead that does the same thing. Signed-off-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de> Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
* SBR DSP x86: implement SSE sbr_hf_g_filtChristophe GISQUET2012-02-23
| | | | | | | | | | | | | | | Unrolling the main loop to process, instead of 4 elements: - 8: minor gain of 2 cycles (not worth the extra object size) - 2: loss of 8 cycles. Assigning STEP to a register is a loss. Output address (Y) is almost always unaligned. Timings: - C (32/64 bits): 117/109 cycles - SSE: 57 cycles Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
* SBR DSP x86: implement SSE sbr_sum_square_sseChristophe GISQUET2012-02-23
The 32bits targets have been compiled with -mfpmath=sse for proper reference. sbr_sum_square C /32bits: 82c (unrolled)/102c C /64bits: 69c (unrolled)/82c SSE/32bits: 42c SSE/64bits: 31c Use of SSE4.1 dpps to perform the final sum is slower. Not unrolling to perform 8 operations in a loop yields 10 more cycles. Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
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