| Commit message (Collapse) | Author | Age |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Intel's Instruction Set Reference (as of September 2015) clearly states
that cvtpi2ps switches to MMX state. Actual CPUs do not switch if the
source is a memory location. The Instruction Set Reference from 1999
(Order Number 243191) describes this behaviour but all later versions
I've seen have make no distinction whether MMX registers or memory is
used as source.
The documentation for the matching SSE2 instruction to convert to double
(cvtpi2pd) was fixed (see the valgrind bug
https://bugs.kde.org/show_bug.cgi?id=210264).
It will take time to get a clarification and fixes in place. In the
meantime it makes sense to change ff_int32_to_float_fmul_scalar_sse to
be correct according to the documentation. The vast majority of users
will have SSE2 so a change to the SSE version has little effect.
Fixes fate-checkasm on x86 valgrind targets.
Valgrind 'bug' reported as https://bugs.kde.org/show_bug.cgi?id=357059
|
|
|
|
| |
This reverts commit 5dfe4edad63971d669ae456b0bc40ef9364cca80.
|
| |
|
|
|
|
|
|
|
| |
The .text section is already 16-byte aligned by default on all supported
platforms so `SECTION_TEXT` isn't any different from `SECTION .text`.
Signed-off-by: Anton Khirnov <anton@khirnov.net>
|
| |
|
|
|
|
| |
This helps grepping for functions, among other things.
|
|
|
|
| |
Signed-off-by: Martin Storsjö <martin@martin.st>
|
| |
|
| |
|
| |
|
| |
|
|
|
|
|
| |
This is more consistent with the way we handle C #includes and
it simplifies the build system.
|
|
|
|
| |
This is necessary to allow refactoring some x86util macros with cpuflags.
|
|
|
|
|
|
| |
nasm prints a warning if the colon is missing.
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
|
|
|
|
| |
Currently there is a wild mix of 3dn2/3dnow2/3dnowext. Switching to
"3dnowext", which is a more common name of the CPU flag, as reported
e.g. by the Linux kernel, unifies this.
|
|
|
|
|
|
| |
This gets rid of a variable-length array and a for loop in C code.
Signed-off-by: Martin Storsjö <martin@martin.st>
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add support for all x86-64 registers
Prefer caller-saved register over callee-saved on WIN64
Support up to 15 function arguments
Also (by Ronald S. Bultje)
Fix up our asm to work with new x86inc.asm.
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
Signed-off-by: Justin Ruggles <justin.ruggles@gmail.com>
|
|
|
|
| |
This allows combining multiple conditionals in a single statement.
|
|
|
|
|
|
|
| |
The calling convention only allows 4 non-stack parameter, with each
float or int register being skipped if not used.
fixes Bug 64
|
| |
|
| |
|
| |
|
|
|
|
| |
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
|
|
|
|
| |
This allows using it in swscale also.
|
|
|
|
| |
This allows using it in libswscale/ also.
|
|
|
|
| |
125->104 cycles on penryn (x86_64 only)
|
|
|
|
|
|
| |
This format is still used by e.g. OS/2.
Signed-off-by: Diego Biurrun <diego@biurrun.de>
|
|
|
|
|
| |
Partially based on patches by clsid2 in ffdshow-tryout.
ff_float_interleave6() x86 improvements by Loren Merrit.
|
| |
|
|
|
|
| |
Signed-off-by: Mans Rullgard <mans@mansr.com>
|
|
This will be beneficial for use with the audio conversion API without
requiring it to depend on all of dsputil.
Signed-off-by: Mans Rullgard <mans@mansr.com>
|