| Commit message (Collapse) | Author | Age |
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Some versions of the GNU assembler do not handle 64-bit
immediate operands containing arithmetic. Writing the
value out in full works correctly.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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This function is called with only 8-byte alignment from
imdct for size 16. The fft4 function is not called for
the larger FFT or MDCT sizes, so this has no impact on
typical uses.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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PLD is present in ARMv5TE and later, which is checked for separately.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Note: this is 4:4:4 from the 2007 spec revision, not the previous (now deprecated) 4:4:4 mode in H.264.
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Use push/pop instead of stmdb/ldmia for stack operations. This
is the preferred syntax.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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- use 'const' macro to define coeff table
- add missing endfunc
- remove superflous directives
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Current GCC versions know how to generate these instructions
properly and avoiding inline asm gives better code. The MULH
function for ARMv5 uses the same instruction and is also not
needed any more.
The MLS64 macro remains since negating an input would normally
not be allowed as it would fail for INT_MIN. In our uses, the
inputs never have this value and thus negating is safe.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Reasonable gcc versions get this one right on their own.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Prior to ARMv6, the destination registers of the SMULL instruction
must be distinct from the first source register. Marking the
output early-clobber ensures it is allocated unique registers.
This restriction is dropped in ARMv6 and later, so allowing overlap
between input and output registers there might give better code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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This enables UAL syntax for all asm files instead of only those
which happen to be incompatible with the old, deprecated syntax.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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instead of just 0 to 4.
This does all the actual bit counting as a final step.
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This adds output operands for modified memory allowing the
volatile qualifiers to be dropped.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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This function uses old-style vector operations deprecated in VFPv3.
Some implementations, e.g. Cortex-A9, support them only through
slow software emulation. Cortex-A8 does have this functionality
in hardware, but as it also has NEON, this function is not used
there regardless.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Add missing multiple inclusion guards; clean up #endif comments;
add missing library prefixes; keep guard names consistent.
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Surround memset and ff_vp8_dct_cat_prob by X() in order to fix iOS build
Includes patch by Luca Barbato <lu_zero@gentoo.org>.
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
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decoder.
This patch lets e.g. dsputil_init chose dsp functions with respect to
the bit depth to decode. The naming scheme of bit depth dependent
functions is <base name>_<bit depth>[_<prefix>] (i.e. the old
clear_blocks_c is now named clear_blocks_8_c).
Note: Some of the functions for high bit depth is not dependent on the
bit depth, but only on the pixel size. This leaves some room for
optimizing binary size.
Preparatory patch for high bit depth h264 decoding support.
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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The length argument should be unsigned. No change in code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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This leaves fft.h with only the core FFT and MDCT definitions
thus making it more managable.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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The assembler emits literal pools too far from the load instructions,
so we must do it explicitly at a suitable location.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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6% faster SSE FFT on Conroe, 2.5% on Penryn.
Signed-off-by: Janne Grunau <janne-ffmpeg@jannau.net>
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Approximately 5% faster on Cortex-A8.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Approximately 3% faster on Cortex-A8.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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This adds NEON optimised versions of all functions in VP8DSPContext.
Based on initial work by Rob Clark.
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Signed-off-by: Mans Rullgard <mans@mansr.com>
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