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* aarch64: hevc_idct: Fix overflows in idct_dcMartin Storsjö2021-05-22
| | | | | | | | This is marginally slower, but correct for all input values. The previous implementation failed with certain input seeds, e.g. "checkasm --test=hevc_idct 98". Signed-off-by: Martin Storsjö <martin@martin.st>
* avcodec: Remove deprecated old encode/decode APIsAndreas Rheinhardt2021-04-27
| | | | | | | | Deprecated in commits 7fc329e2dd6226dfecaa4a1d7adf353bf2773726 and 31f6a4b4b83aca1d73f3cfc99ce2b39331970bf3. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com> Signed-off-by: James Almer <jamrial@gmail.com>
* Include attributes.h directlyAndreas Rheinhardt2021-04-19
| | | | | | | | Some files currently rely on libavutil/cpu.h to include it for them; yet said file won't use include it any more after the currently deprecated functions are removed, so include attributes.h directly. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
* lavc/aarch64: add pred16x16 10-bit functionsMikhail Nitenko2021-04-19
| | | | | | | | | | | | | | Benchmarks: A53 A72 pred16x16_dc_10_c: 136.0 124.0 pred16x16_dc_10_neon: 121.2 106.0 pred16x16_horizontal_10_c: 155.0 73.2 pred16x16_horizontal_10_neon: 82.2 67.7 pred16x16_top_dc_10_c: 106.0 93.7 pred16x16_top_dc_10_neon: 87.7 77.2 pred16x16_vertical_10_c: 83.0 67.7 pred16x16_vertical_10_neon: 54.2 61.7 Some functions work slower than C and are left commented out.
* lavc/aarch64: change h264pred_init structureMikhail Nitenko2021-04-19
| | | | Change structure to allow the addition of other bit depths.
* aarch64: h264pred: Optimize the inner loop of existing 8 bit functionsMartin Storsjö2021-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the loop counter decrement further from the branch instruction, this hides the latency of the decrement. In loops that first load, then store (the horizontal prediction cases), do the decrement after the load (where the next instruction would stall a bit anyway, waiting for the result of the load). In loops that store twice using the same destination register, also do the decrement between the two stores (as the second store would need to wait for the updated destination register from the first instruction). In loops that store twice to two different destination registers, do the decrement before both stores, to do it as soon before the branch as possible. This gives minor (1-2 cycle) speedups in most cases (modulo measurement noise), but the horizontal prediction functions get a rather notable speedup on the Cortex A53. Before: Cortex A53 A72 A73 pred8x8_dc_8_neon: 60.7 46.2 39.2 pred8x8_dc_128_8_neon: 30.7 18.0 14.0 pred8x8_horizontal_8_neon: 42.2 29.2 18.5 pred8x8_left_dc_8_neon: 52.7 36.2 32.2 pred8x8_mad_cow_dc_0l0_8_neon: 48.2 27.7 25.7 pred8x8_mad_cow_dc_0lt_8_neon: 52.5 33.2 34.7 pred8x8_mad_cow_dc_l0t_8_neon: 52.5 31.7 33.2 pred8x8_mad_cow_dc_l00_8_neon: 43.2 27.0 25.5 pred8x8_plane_8_neon: 112.2 86.2 88.2 pred8x8_top_dc_8_neon: 40.7 23.0 21.2 pred8x8_vertical_8_neon: 27.2 15.5 14.0 pred16x16_dc_8_neon: 91.0 73.2 70.5 pred16x16_dc_128_8_neon: 43.0 34.7 30.7 pred16x16_horizontal_8_neon: 86.0 49.7 44.7 pred16x16_left_dc_8_neon: 87.0 67.2 67.5 pred16x16_plane_8_neon: 236.0 175.7 173.0 pred16x16_top_dc_8_neon: 53.2 39.0 41.7 pred16x16_vertical_8_neon: 41.7 29.7 31.0 After: pred8x8_dc_8_neon: 59.0 46.7 42.5 pred8x8_dc_128_8_neon: 28.2 18.0 14.0 pred8x8_horizontal_8_neon: 34.2 29.2 18.5 pred8x8_left_dc_8_neon: 51.0 38.2 32.7 pred8x8_mad_cow_dc_0l0_8_neon: 46.7 28.2 26.2 pred8x8_mad_cow_dc_0lt_8_neon: 55.2 33.7 37.5 pred8x8_mad_cow_dc_l0t_8_neon: 51.2 31.7 37.2 pred8x8_mad_cow_dc_l00_8_neon: 41.7 27.5 26.0 pred8x8_plane_8_neon: 111.5 86.5 89.5 pred8x8_top_dc_8_neon: 39.0 23.2 21.0 pred8x8_vertical_8_neon: 27.2 16.0 14.0 pred16x16_dc_8_neon: 85.0 70.2 70.5 pred16x16_dc_128_8_neon: 42.0 30.0 30.7 pred16x16_horizontal_8_neon: 66.5 49.5 42.5 pred16x16_left_dc_8_neon: 81.0 66.5 67.5 pred16x16_plane_8_neon: 235.0 175.7 173.0 pred16x16_top_dc_8_neon: 52.0 39.0 41.7 pred16x16_vertical_8_neon: 40.2 33.2 31.0 Despite this, a number of these functions still are slower than what e.g. GCC 7 generates - this shows the relative speedup of the neon codepaths over the compiler generated ones: Cortex A53 A72 A73 pred8x8_dc_8_neon: 0.86 0.65 1.04 pred8x8_dc_128_8_neon: 0.59 0.44 0.62 pred8x8_horizontal_8_neon: 1.51 0.58 1.30 pred8x8_left_dc_8_neon: 0.72 0.56 0.89 pred8x8_mad_cow_dc_0l0_8_neon: 0.93 0.93 1.37 pred8x8_mad_cow_dc_0lt_8_neon: 1.37 1.41 1.68 pred8x8_mad_cow_dc_l0t_8_neon: 1.21 1.17 1.32 pred8x8_mad_cow_dc_l00_8_neon: 1.24 1.19 1.60 pred8x8_plane_8_neon: 3.36 3.58 3.76 pred8x8_top_dc_8_neon: 0.97 0.99 1.43 pred8x8_vertical_8_neon: 0.86 0.78 1.18 pred16x16_dc_8_neon: 1.20 1.06 1.49 pred16x16_dc_128_8_neon: 0.83 0.95 0.99 pred16x16_horizontal_8_neon: 1.78 0.96 1.59 pred16x16_left_dc_8_neon: 1.06 0.96 1.32 pred16x16_plane_8_neon: 5.78 6.49 7.19 pred16x16_top_dc_8_neon: 1.48 1.53 1.94 pred16x16_vertical_8_neon: 1.39 1.34 1.98 In particular, on Cortex A72, many of these functions are slower than the compiler generated code, while they're more beneficial on e.g. the Cortex A73. Signed-off-by: Martin Storsjö <martin@martin.st>
* avcodec: add missing FF_API_OLD_ENCDEC wrappers to xmm clobber functionsJames Almer2021-02-26
| | | | Signed-off-by: James Almer <jamrial@gmail.com>
* lavc/aarch64: add HEVC sao_band NEONJosh Dekker2021-02-18
| | | | | | Only works for 8x8. Signed-off-by: Josh Dekker <josh@itanimul.li>
* lavc/aarch64: add HEVC idct_dc NEONJosh Dekker2021-02-18
| | | | Signed-off-by: Josh Dekker <josh@itanimul.li>
* lavc/aarch64: port HEVC add_residual NEONReimar Döffinger2021-02-18
| | | | | | Speedup is fairly small, around 1.5%, but these are fairly simple. Signed-off-by: Josh Dekker <josh@itanimul.li>
* lavc/aarch64: port HEVC SIMD idct NEONReimar Döffinger2021-02-18
| | | | | | | | | | | | Makes SIMD-optimized 8x8 and 16x16 idcts for 8 and 10 bit depth available on aarch64. For a UHD HDR (10 bit) sample video these were consuming the most time and this optimization reduced overall decode time from 19.4s to 16.4s, approximately 15% speedup. Test sample was the first 300 frames of "LG 4K HDR Demo - New York.ts", running on Apple M1. Signed-off-by: Josh Dekker <josh@itanimul.li>
* lavu: move LOCAL_ALIGNED from internal.h to mem_internal.hAnton Khirnov2021-01-01
| | | | That is a more appropriate place for it.
* libavcodec: aarch64: Add a NEON implementation of pixblockdspMartin Storsjö2020-05-15
| | | | | | | | | | | | | | Cortex A53 A72 A73 get_pixels_c: 140.7 87.7 72.5 get_pixels_neon: 46.0 20.0 19.5 get_pixels_unaligned_c: 140.7 87.7 73.0 get_pixels_unaligned_neon: 49.2 20.2 26.2 diff_pixels_c: 209.7 133.7 138.7 diff_pixels_neon: 54.2 31.7 23.5 diff_pixels_unaligned_c: 209.7 134.2 139.0 diff_pixels_unaligned_neon: 68.0 27.7 41.7 Signed-off-by: Martin Storsjö <martin@martin.st>
* lavc/aarch64: Remove unneeded file vp9mc_aarch64.cCarl Eugen Hoyos2020-03-11
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* lavc/aarch64: Fix suffix of new file vp9mc_aarch64.Carl Eugen Hoyos2020-03-11
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* lavc/aarch64: Fix compilation with --disable-neonCarl Eugen Hoyos2020-03-11
| | | | Fixes ticket #8565.
* lavc/aarch64: Move non-neon vp9 copy functions out of neon source file.Carl Eugen Hoyos2020-03-11
| | | | Fixes part of ticket #8565.
* aarch64/opusdsp: do not clobber register v8Lynne2019-08-15
| | | | A part of v8-v15 needs to be preserved across calls.
* aarch64/asm-offsets: remove old CELT offsetsLynne2019-05-14
| | | | They're not used and they're incorrect.
* aarch64/opusdsp: implement NEON accelerated postfilter and deemphasisLynne2019-04-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 153372 UNITS in postfilter_c, 65536 runs, 0 skips 73164 UNITS in postfilter_neon, 65536 runs, 0 skips -> 2.1x speedup 80591 UNITS in deemphasis_c, 131072 runs, 0 skips 43969 UNITS in deemphasis_neon, 131072 runs, 0 skips -> 1.83x speedup Total decoder speedup: ~15% on a Raspberry Pi 3 (from 28.1x to 33.5x realtime) Deemphasis SIMD based on the following unrolling: const float c1 = CELT_EMPH_COEFF, c2 = c1*c1, c3 = c2*c1, c4 = c3*c1; float state = coeff; for (int i = 0; i < len; i += 4) { y[0] = x[0] + c1*state; y[1] = x[1] + c2*state + c1*x[0]; y[2] = x[2] + c3*state + c1*x[1] + c2*x[0]; y[3] = x[3] + c4*state + c1*x[2] + c2*x[1] + c3*x[0]; state = y[3]; y += 4; x += 4; } Unlike the x86 version, duplication is used instead of pslldq so the structure and tables are different.
* Merge commit '186bd30aa3b6c2b29b4dbf18278700b572068b1e'James Almer2019-03-14
|\ | | | | | | | | | | | | * commit '186bd30aa3b6c2b29b4dbf18278700b572068b1e': h264/arm64: implement missing 4:2:2 chroma loop filter neon functions Merged-by: James Almer <jamrial@gmail.com>
| * h264/arm64: implement missing 4:2:2 chroma loop filter neon functionsJanne Grunau2019-02-27
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* | Merge commit '7e42d5f0ab2aeac811fd01e122627c9198b13f01'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '7e42d5f0ab2aeac811fd01e122627c9198b13f01': aarch64: vp8: Optimize vp8_idct_add_neon for aarch64 Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Optimize vp8_idct_add_neon for aarch64Martin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous version was a pretty exact translation of the arm version. This version does do some unnecessary arithemetic (it does more operations on vectors that are only half filled; it does 4 uaddw and 4 sqxtun instead of 2 of each), but it reduces the overhead of packing data together (which could be done for free in the arm version). This gives a decent speedup on Cortex A53, a minor speedup on A72 and a very minor slowdown on Cortex A73. Before: Cortex A53 A72 A73 vp8_idct_add_neon: 79.7 67.5 65.0 After: vp8_idct_add_neon: 67.7 64.8 66.7 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '49f9c4272c4029b57ff300d908ba03c6332fc9c4'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '49f9c4272c4029b57ff300d908ba03c6332fc9c4': aarch64: vp8: Skip saturating in shrn in ff_vp8_idct_add_neon Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Skip saturating in shrn in ff_vp8_idct_add_neonMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | The original arm version didn't do saturation here. This probably doesn't make any difference for performance, but reduces the differences. Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '37394ef01b040605f8e1c98e73aa12b1c0bcba07'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '37394ef01b040605f8e1c98e73aa12b1c0bcba07': aarch64: vp8: Optimize put_epel16_h6v6 with vp8_epel8_v6_y2 Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Optimize put_epel16_h6v6 with vp8_epel8_v6_y2Martin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | This makes it similar to put_epel16_v6, and gives a large speedup on Cortex A53, a minor speedup on A72 and a very minor slowdown on A73. Before: Cortex A53 A72 A73 vp8_put_epel16_h6v6_neon: 2211.4 1586.5 1431.7 After: vp8_put_epel16_h6v6_neon: 1736.9 1522.0 1448.1 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit 'e39a9212ab37a55b346801c77487d8a47b6f9fe2'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit 'e39a9212ab37a55b346801c77487d8a47b6f9fe2': aarch64: vp8: Port bilin functions from arm version Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Port bilin functions from arm versionMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cortex A53 A72 A73 vp8_put_bilin4_h_c: 303.8 102.2 161.8 vp8_put_bilin4_h_neon: 100.0 40.9 41.2 vp8_put_bilin4_hv_c: 322.8 201.0 305.9 vp8_put_bilin4_hv_neon: 156.8 72.6 77.0 vp8_put_bilin4_v_c: 304.7 101.7 166.5 vp8_put_bilin4_v_neon: 82.7 41.2 33.0 vp8_put_bilin8_h_c: 1192.7 352.5 623.8 vp8_put_bilin8_h_neon: 213.5 70.2 87.8 vp8_put_bilin8_hv_c: 1098.6 769.2 1041.9 vp8_put_bilin8_hv_neon: 324.0 123.5 146.0 vp8_put_bilin8_v_c: 1193.9 350.4 617.7 vp8_put_bilin8_v_neon: 183.9 60.7 64.7 vp8_put_bilin16_h_c: 2353.1 671.2 1223.3 vp8_put_bilin16_h_neon: 261.9 140.7 145.0 vp8_put_bilin16_hv_c: 2453.2 1470.9 2355.2 vp8_put_bilin16_hv_neon: 383.9 196.0 217.0 vp8_put_bilin16_v_c: 2349.3 669.8 1251.2 vp8_put_bilin16_v_neon: 202.9 110.7 96.2 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '58d154922707bfeb873cb3a7476e0f94b17463dd'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '58d154922707bfeb873cb3a7476e0f94b17463dd': aarch64: vp8: Port epel4 functions from arm version Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Port epel4 functions from arm versionMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cortex A53 A72 A73 vp8_put_epel4_h4_c: 631.4 291.7 367.8 vp8_put_epel4_h4_neon: 241.0 131.0 155.7 vp8_put_epel4_h4v4_c: 967.5 529.3 667.7 vp8_put_epel4_h4v4_neon: 429.3 241.8 279.7 vp8_put_epel4_h4v6_c: 1374.7 657.5 864.5 vp8_put_epel4_h4v6_neon: 515.5 295.5 334.7 vp8_put_epel4_h6_c: 851.0 421.0 486.0 vp8_put_epel4_h6_neon: 321.5 195.0 217.7 vp8_put_epel4_h6v4_c: 1111.3 621.1 781.2 vp8_put_epel4_h6v4_neon: 539.2 328.0 365.3 vp8_put_epel4_h6v6_c: 1561.3 763.3 999.7 vp8_put_epel4_h6v6_neon: 645.5 401.0 434.7 vp8_put_epel4_v4_c: 663.8 298.3 357.0 vp8_put_epel4_v4_neon: 116.0 81.5 72.5 vp8_put_epel4_v6_c: 870.5 437.0 507.4 vp8_put_epel4_v6_neon: 147.7 108.8 92.0 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit 'cc7ba00c35faf0478f1f56215e926f70ccb31282'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit 'cc7ba00c35faf0478f1f56215e926f70ccb31282': aarch64: vp8: Port missing epel8 functions from arm version Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Port missing epel8 functions from arm versionMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Cortex A53 A72 A73 vp8_put_epel8_h4_c: 2594.8 1159.6 1374.8 vp8_put_epel8_h4_neon: 506.4 244.2 314.0 vp8_put_epel8_h6_c: 3445.8 1677.1 1811.3 vp8_put_epel8_h6_neon: 634.4 371.7 433.0 vp8_put_epel8_v4_c: 2614.0 1174.8 1378.0 vp8_put_epel8_v4_neon: 321.0 221.7 235.8 vp8_put_epel8_v6_c: 3635.5 1703.0 2079.2 vp8_put_epel8_v6_neon: 416.9 317.0 295.5 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '52c9b0a6c0d02cff6caebcf6989e565e05b55200'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '52c9b0a6c0d02cff6caebcf6989e565e05b55200': aarch64: vp8: Port vp8_luma_dc_wht and vp8_idct_dc_add4uv from arm version Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Port vp8_luma_dc_wht and vp8_idct_dc_add4uv from arm versionMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | Cortex A53 A72 A73 vp8_luma_dc_wht_c: 115.7 75.7 90.7 vp8_luma_dc_wht_neon: 60.7 41.2 45.7 vp8_idct_dc_add4uv_c: 376.1 262.9 282.5 vp8_idct_dc_add4uv_neon: 52.0 29.0 37.0 Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit 'c513fcd7d235aa4cef45a6c3125bd4dcc03bf276'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit 'c513fcd7d235aa4cef45a6c3125bd4dcc03bf276': aarch64: vp8: Fix a typo in a comment Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Fix a typo in a commentMartin Storsjö2019-02-19
| | | | | | | | Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit 'f1011ea28a4048ddec97794ca3e9901474fe055f'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit 'f1011ea28a4048ddec97794ca3e9901474fe055f': aarch64: vp8: Reorder the function pointer inits to match the arm original Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Reorder the function pointer inits to match the arm originalMartin Storsjö2019-02-19
| | | | | | | | Signed-off-by: Martin Storsjö <martin@martin.st>
| * aarch64: vp8: Move the vp8dsp makefile entries to the right placesMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | Even if NEON would be disabled, the init functions should be built as they are called as long as ARCH_AARCH64 is set. These functions are part of a generic DSP subsytem, not tied directly to one decoder. (They should be built if the vp7 decoder is enabled, even if the vp8 decoder is disabled.) Signed-off-by: Martin Storsjö <martin@martin.st>
| * aarch64: vp8: Remove superfluous includesMartin Storsjö2019-02-19
| | | | | | | | | | | | This fixes building with MSVC, which lacks unistd.h. Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '85bfaa4949f4afcde19061def3e8a18988964858'James Almer2019-03-14
|\| | | | | | | | | | | | | * commit '85bfaa4949f4afcde19061def3e8a18988964858': aarch64: vp8: Use the proper aarch64 form for conditional branches Merged-by: James Almer <jamrial@gmail.com>
| * aarch64: vp8: Use the proper aarch64 form for conditional branchesMartin Storsjö2019-02-19
| | | | | | | | | | | | | | The previous form also does seem to assemble on current tools, but I think it might fail on some older aarch64 tools. Signed-off-by: Martin Storsjö <martin@martin.st>
| * aarch64: vp8: Fix assembling with armasm64Martin Storsjö2019-02-19
| | | | | | | | Signed-off-by: Martin Storsjö <martin@martin.st>
| * aarch64: vp8: Fix assembling with clangMartin Storsjö2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This also partially fixes assembling with MS armasm64 (via gas-preprocessor). The movrel macro invocations need to pass the offset via a separate parameter. Mach-o and COFF relocations don't allow a negative offset to a symbol, which is handled properly if the offset is passed via the parameter. If no offset parameter is given, the macro evaluates to something like "adrp x17, subpel_filters-16+(0)", which older clang versions also fail to parse (the older clang versions only support one single offset term, although it can be a parenthesis. Signed-off-by: Martin Storsjö <martin@martin.st>
* | Merge commit '0801853e640624537db386727b36fa97aa6258e7'James Almer2019-03-14
|\| | | | | | | | | | | | | | | | | * commit '0801853e640624537db386727b36fa97aa6258e7': libavcodec: vp8 neon optimizations for aarch64 See 833fed5253617924c41132e0ab261c1d8c076360 Merged-by: James Almer <jamrial@gmail.com>
| * libavcodec: vp8 neon optimizations for aarch64Magnus Röös2019-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Partial port of the ARM Neon for aarch64. Benchmarks from fate: benchmarking with Linux Perf Monitoring API nop: 58.6 checkasm: using random seed 1760970128 NEON: - vp8dsp.idct [OK] - vp8dsp.mc [OK] - vp8dsp.loopfilter [OK] checkasm: all 21 tests passed vp8_idct_add_c: 201.6 vp8_idct_add_neon: 83.1 vp8_idct_dc_add_c: 107.6 vp8_idct_dc_add_neon: 33.8 vp8_idct_dc_add4y_c: 426.4 vp8_idct_dc_add4y_neon: 59.4 vp8_loop_filter8uv_h_c: 688.1 vp8_loop_filter8uv_h_neon: 216.3 vp8_loop_filter8uv_inner_h_c: 649.3 vp8_loop_filter8uv_inner_h_neon: 195.3 vp8_loop_filter8uv_inner_v_c: 544.8 vp8_loop_filter8uv_inner_v_neon: 131.3 vp8_loop_filter8uv_v_c: 706.1 vp8_loop_filter8uv_v_neon: 141.1 vp8_loop_filter16y_h_c: 668.8 vp8_loop_filter16y_h_neon: 242.8 vp8_loop_filter16y_inner_h_c: 647.3 vp8_loop_filter16y_inner_h_neon: 224.6 vp8_loop_filter16y_inner_v_c: 647.8 vp8_loop_filter16y_inner_v_neon: 128.8 vp8_loop_filter16y_v_c: 721.8 vp8_loop_filter16y_v_neon: 154.3 vp8_loop_filter_simple_h_c: 387.8 vp8_loop_filter_simple_h_neon: 187.6 vp8_loop_filter_simple_v_c: 384.1 vp8_loop_filter_simple_v_neon: 78.6 vp8_put_epel8_h4v4_c: 3971.1 vp8_put_epel8_h4v4_neon: 855.1 vp8_put_epel8_h4v6_c: 5060.1 vp8_put_epel8_h4v6_neon: 989.6 vp8_put_epel8_h6v4_c: 4320.8 vp8_put_epel8_h6v4_neon: 1007.3 vp8_put_epel8_h6v6_c: 5449.3 vp8_put_epel8_h6v6_neon: 1158.1 vp8_put_epel16_h6_c: 6683.8 vp8_put_epel16_h6_neon: 831.8 vp8_put_epel16_h6v6_c: 11110.8 vp8_put_epel16_h6v6_neon: 2214.8 vp8_put_epel16_v6_c: 7024.8 vp8_put_epel16_v6_neon: 799.6 vp8_put_pixels8_c: 112.8 vp8_put_pixels8_neon: 78.1 vp8_put_pixels16_c: 131.3 vp8_put_pixels16_neon: 129.8 This contains a fix to include guards by Carl Eugen Hoyos. Signed-off-by: Martin Storsjö <martin@martin.st>
* | lavc/aarch64/h264dsp_init: Only use neon horizontal intra loopfilter for 4:2:0.Carl Eugen Hoyos2019-02-20
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* | aarch64/h264dsp: change loop filter stride argument to ptrdiff_tJames Almer2019-02-20
| | | | | | | | | | | | This was missed in d5d699ab6e6f8a8290748d107416fd5c19757a1b Signed-off-by: James Almer <jamrial@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-25 07:31:48 +0000