diff options
| author | Martin Storsjö <martin@martin.st> | 2016-07-17 13:31:06 +0300 |
|---|---|---|
| committer | Martin Storsjö <martin@martin.st> | 2016-07-17 21:48:17 +0300 |
| commit | 37961044c6cc633c28d87293775d8e985d156921 (patch) | |
| tree | 99da0983f8e49aed2e496f228ea7aed8d2ba7a3d /tests | |
| parent | 59aeed93e4e928b884be72b8c267ff6b2785ab66 (diff) | |
checkasm: arm: Ignore changes to bits 0-4 and 7 of FPSCR
These bits are set by exceptions in NEON instructions.
Also print the differing bits when FPSCR is clobbered,
and use bic instead of lsl, for clearing the topmost bits.
Signed-off-by: Martin Storsjö <martin@martin.st>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/checkasm/arm/checkasm.S | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tests/checkasm/arm/checkasm.S b/tests/checkasm/arm/checkasm.S index 2768bb3e74..ab53d0ac06 100644 --- a/tests/checkasm/arm/checkasm.S +++ b/tests/checkasm/arm/checkasm.S @@ -40,7 +40,7 @@ const register_init, align=3 endconst const error_message_fpscr - .asciz "failed to preserve register FPSCR" + .asciz "failed to preserve register FPSCR, changed bits: %x" error_message_gpr: .asciz "failed to preserve register r%d" error_message_vfp: @@ -106,11 +106,13 @@ function checkasm_checked_call_\variant, export=1 .endr .purgem check_reg_vfp - fmrx r0, FPSCR + fmrx r1, FPSCR ldr r3, [sp, #8] - eor r0, r0, r3 + eor r1, r1, r3 + @ Ignore changes in bits 0-4 and 7 + bic r1, r1, #0x9f @ Ignore changes in the topmost 5 bits - lsls r0, r0, #5 + bics r1, r1, #0xf8000000 bne 3f .endif |