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authorChristophe Gisquet <christophe.gisquet@gmail.com>2012-02-24 22:11:19 +0100
committerDiego Biurrun <diego@biurrun.de>2012-12-07 11:04:26 +0100
commit2aef3d66c9cdf9d9ad3ecec2fb0c6b3020e9d3b0 (patch)
tree4e40bc1d24002be20fa1b0592a5b66e4cb9657d2 /tests/fate/dpcm.mak
parent9a16359c38888af6beab7e688fc55eaa60c835ec (diff)
SBR DSP x86: implement SSE sbr_hf_gen
Start and end index are multiple of 2, therefore guaranteeing aligned access. Also, this allows to generate 4 floats per loop, keeping the alignment all along. Timing: - 32 bits: 326c -> 172c - 64 bits: 323c -> 156c Signed-off-by: Diego Biurrun <diego@biurrun.de>
Diffstat (limited to 'tests/fate/dpcm.mak')
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