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authorMichael Niedermayer <michaelni@gmx.at>2012-10-31 14:16:04 +0100
committerMichael Niedermayer <michaelni@gmx.at>2012-10-31 14:16:18 +0100
commit28c0678eb764b8d10faf1a988d2f0e2dc79c96a5 (patch)
tree5b1c2da26f0d95c5acd7d042dc1cf8666f22e316 /libswscale/x86
parent4b874fc4fc2739db7a907ce430ac862e625b7387 (diff)
parentbe923ed659016350592acb9b3346f706f8170ac5 (diff)
Merge commit 'be923ed659016350592acb9b3346f706f8170ac5'
* commit 'be923ed659016350592acb9b3346f706f8170ac5': x86: fmtconvert: port to cpuflags x86: MMX2 ---> MMXEXT in macro names Merged-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'libswscale/x86')
-rw-r--r--libswscale/x86/swscale_template.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/libswscale/x86/swscale_template.c b/libswscale/x86/swscale_template.c
index 5815718cfa..62265db30f 100644
--- a/libswscale/x86/swscale_template.c
+++ b/libswscale/x86/swscale_template.c
@@ -593,7 +593,7 @@ static void RENAME(yuv2rgb555_X)(SwsContext *c, const int16_t *lumFilter,
"cmp "#dstw", "#index" \n\t"\
" jb 1b \n\t"
-#define WRITEBGR24MMX2(dst, dstw, index) \
+#define WRITEBGR24MMXEXT(dst, dstw, index) \
/* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */\
"movq "MANGLE(ff_M24A)", %%mm0 \n\t"\
"movq "MANGLE(ff_M24C)", %%mm7 \n\t"\
@@ -643,7 +643,7 @@ static void RENAME(yuv2rgb555_X)(SwsContext *c, const int16_t *lumFilter,
#if COMPILE_TEMPLATE_MMXEXT
#undef WRITEBGR24
-#define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX2(dst, dstw, index)
+#define WRITEBGR24(dst, dstw, index) WRITEBGR24MMXEXT(dst, dstw, index)
#else
#undef WRITEBGR24
#define WRITEBGR24(dst, dstw, index) WRITEBGR24MMX(dst, dstw, index)
@@ -1485,7 +1485,7 @@ static void RENAME(hyscale_fast)(SwsContext *c, int16_t *dst,
PREFETCH" 64(%%"REG_c") \n\t"
#if ARCH_X86_64
-#define CALL_MMX2_FILTER_CODE \
+#define CALL_MMXEXT_FILTER_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"movl (%%"REG_b", %%"REG_a"), %%esi \n\t"\
@@ -1494,7 +1494,7 @@ static void RENAME(hyscale_fast)(SwsContext *c, int16_t *dst,
"xor %%"REG_a", %%"REG_a" \n\t"\
#else
-#define CALL_MMX2_FILTER_CODE \
+#define CALL_MMXEXT_FILTER_CODE \
"movl (%%"REG_b"), %%esi \n\t"\
"call *%4 \n\t"\
"addl (%%"REG_b", %%"REG_a"), %%"REG_c" \n\t"\
@@ -1503,14 +1503,14 @@ static void RENAME(hyscale_fast)(SwsContext *c, int16_t *dst,
#endif /* ARCH_X86_64 */
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
#if defined(PIC)
"mov %5, %%"REG_b" \n\t"
@@ -1580,10 +1580,10 @@ static void RENAME(hcscale_fast)(SwsContext *c, int16_t *dst1, int16_t *dst2,
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
"xor %%"REG_a", %%"REG_a" \n\t" // i
"mov %5, %%"REG_c" \n\t" // src
"mov %6, %%"REG_D" \n\t" // buf2
@@ -1591,10 +1591,10 @@ static void RENAME(hcscale_fast)(SwsContext *c, int16_t *dst1, int16_t *dst2,
PREFETCH" 32(%%"REG_c") \n\t"
PREFETCH" 64(%%"REG_c") \n\t"
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
- CALL_MMX2_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
+ CALL_MMXEXT_FILTER_CODE
#if defined(PIC)
"mov %7, %%"REG_b" \n\t"