diff options
| author | Kaustubh Raste <kaustubh.raste@imgtec.com> | 2017-09-26 10:51:12 +0530 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2017-09-27 21:15:57 +0200 |
| commit | 10ab5534e0438cb3bcbf43852010c67b0063f204 (patch) | |
| tree | d7d1c154a13726c0d0c7c02a601fc48086d9d1f2 /libavutil/mips | |
| parent | ed1586b921d72ac4231a3e92e41411563123845b (diff) | |
avcodec/mips: Improve avc weighted mc msa functions
Replace generic with block size specific function.
Signed-off-by: Kaustubh Raste <kaustubh.raste@imgtec.com>
Reviewed-by: Manojkumar Bhosale <Manojkumar.Bhosale@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'libavutil/mips')
| -rw-r--r-- | libavutil/mips/generic_macros_msa.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/libavutil/mips/generic_macros_msa.h b/libavutil/mips/generic_macros_msa.h index bda3ed263f..7de97dd0f8 100644 --- a/libavutil/mips/generic_macros_msa.h +++ b/libavutil/mips/generic_macros_msa.h @@ -1635,6 +1635,15 @@ MAXI_SH2(RTYPE, in2, in3, max_val); \ } #define MAXI_SH4_UH(...) MAXI_SH4(v8u16, __VA_ARGS__) +#define MAXI_SH4_SH(...) MAXI_SH4(v8i16, __VA_ARGS__) + +#define MAXI_SH8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, max_val) \ +{ \ + MAXI_SH4(RTYPE, in0, in1, in2, in3, max_val); \ + MAXI_SH4(RTYPE, in4, in5, in6, in7, max_val); \ +} +#define MAXI_SH8_UH(...) MAXI_SH8(v8u16, __VA_ARGS__) +#define MAXI_SH8_SH(...) MAXI_SH8(v8i16, __VA_ARGS__) /* Description : Saturate the halfword element values to the max unsigned value of (sat_val+1 bits) @@ -1660,6 +1669,15 @@ SAT_UH2(RTYPE, in2, in3, sat_val); \ } #define SAT_UH4_UH(...) SAT_UH4(v8u16, __VA_ARGS__) +#define SAT_UH4_SH(...) SAT_UH4(v8i16, __VA_ARGS__) + +#define SAT_UH8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, sat_val) \ +{ \ + SAT_UH4(RTYPE, in0, in1, in2, in3, sat_val); \ + SAT_UH4(RTYPE, in4, in5, in6, in7, sat_val); \ +} +#define SAT_UH8_UH(...) SAT_UH8(v8u16, __VA_ARGS__) +#define SAT_UH8_SH(...) SAT_UH8(v8i16, __VA_ARGS__) /* Description : Saturate the halfword element values to the max unsigned value of (sat_val+1 bits) @@ -2040,6 +2058,24 @@ } #define SRL_H4_UH(...) SRL_H4(v8u16, __VA_ARGS__) +#define SRLR_H4(RTYPE, in0, in1, in2, in3, shift) \ +{ \ + in0 = (RTYPE) __msa_srlr_h((v8i16) in0, (v8i16) shift); \ + in1 = (RTYPE) __msa_srlr_h((v8i16) in1, (v8i16) shift); \ + in2 = (RTYPE) __msa_srlr_h((v8i16) in2, (v8i16) shift); \ + in3 = (RTYPE) __msa_srlr_h((v8i16) in3, (v8i16) shift); \ +} +#define SRLR_H4_UH(...) SRLR_H4(v8u16, __VA_ARGS__) +#define SRLR_H4_SH(...) SRLR_H4(v8i16, __VA_ARGS__) + +#define SRLR_H8(RTYPE, in0, in1, in2, in3, in4, in5, in6, in7, shift) \ +{ \ + SRLR_H4(RTYPE, in0, in1, in2, in3, shift); \ + SRLR_H4(RTYPE, in4, in5, in6, in7, shift); \ +} +#define SRLR_H8_UH(...) SRLR_H8(v8u16, __VA_ARGS__) +#define SRLR_H8_SH(...) SRLR_H8(v8i16, __VA_ARGS__) + /* Description : Shift right arithmetic rounded halfwords Arguments : Inputs - in0, in1, shift Outputs - in0, in1, (in place) |