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| author | James Cowgill <james410@cowgill.org.uk> | 2015-03-05 17:40:15 +0000 |
|---|---|---|
| committer | Michael Niedermayer <michaelni@gmx.at> | 2015-03-06 14:37:44 +0100 |
| commit | 157d6f0d5b95261bf053566d8a1c2652387da30c (patch) | |
| tree | ca481834165a1f3c103eea9dc50fd5e877bbcbde /libavutil/mips/float_dsp_mips.c | |
| parent | eae13eae9d6499e81cd77bcd9e13f7bcb31b5577 (diff) | |
mips: port optimizations to mips n64
This mainly consists of replacing all the pointer arithmatic 'addiu'
instructions with PTR_ADDIU which will handle the differences in pointer
sizes when compiled on 64 bit mips systems.
The header asmdefs.h contains the PTR_ macros which expend to the correct mips
instructions to manipulate registers containing pointers.
Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'libavutil/mips/float_dsp_mips.c')
| -rw-r--r-- | libavutil/mips/float_dsp_mips.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/libavutil/mips/float_dsp_mips.c b/libavutil/mips/float_dsp_mips.c index a54f959329..a45568778a 100644 --- a/libavutil/mips/float_dsp_mips.c +++ b/libavutil/mips/float_dsp_mips.c @@ -53,6 +53,7 @@ #include "config.h" #include "libavutil/float_dsp.h" +#include "libavutil/mips/asmdefs.h" #if HAVE_INLINE_ASM && HAVE_MIPSFPU static void vector_fmul_mips(float *dst, const float *src0, const float *src1, @@ -90,9 +91,9 @@ static void vector_fmul_mips(float *dst, const float *src0, const float *src1, "swc1 %[src0_1], 4(%[d]) \n\t" "swc1 %[src0_2], 8(%[d]) \n\t" "swc1 %[src0_3], 12(%[d]) \n\t" - "addiu %[s0], %[s0], 16 \n\t" - "addiu %[s1], %[s1], 16 \n\t" - "addiu %[d], %[d], 16 \n\t" + PTR_ADDIU "%[s0], %[s0], 16 \n\t" + PTR_ADDIU "%[s1], %[s1], 16 \n\t" + PTR_ADDIU "%[d], %[d], 16 \n\t" "bne %[d], %[d_end], 1b \n\t" : [src0_0]"=&f"(src0_0), [src0_1]"=&f"(src0_1), @@ -122,12 +123,12 @@ static void vector_fmul_scalar_mips(float *dst, const float *src, float mul, "lwc1 %[temp1], 4(%[src]) \n\t" "lwc1 %[temp2], 8(%[src]) \n\t" "lwc1 %[temp3], 12(%[src]) \n\t" - "addiu %[dst], %[dst], 16 \n\t" + PTR_ADDIU "%[dst], %[dst], 16 \n\t" "mul.s %[temp0], %[temp0], %[mul] \n\t" "mul.s %[temp1], %[temp1], %[mul] \n\t" "mul.s %[temp2], %[temp2], %[mul] \n\t" "mul.s %[temp3], %[temp3], %[mul] \n\t" - "addiu %[src], %[src], 16 \n\t" + PTR_ADDIU "%[src], %[src], 16 \n\t" "swc1 %[temp0], -16(%[dst]) \n\t" "swc1 %[temp1], -12(%[dst]) \n\t" "swc1 %[temp2], -8(%[dst]) \n\t" @@ -251,8 +252,8 @@ static void butterflies_float_mips(float *av_restrict v1, float *av_restrict v2, "add.s %[temp13], %[temp2], %[temp6] \n\t" "sub.s %[temp14], %[temp3], %[temp7] \n\t" "add.s %[temp15], %[temp3], %[temp7] \n\t" - "addiu %[v1], %[v1], 16 \n\t" - "addiu %[v2], %[v2], 16 \n\t" + PTR_ADDIU "%[v1], %[v1], 16 \n\t" + PTR_ADDIU "%[v2], %[v2], 16 \n\t" "addiu %[pom], %[pom], -1 \n\t" "lwc1 %[temp0], 0(%[v1]) \n\t" "lwc1 %[temp1], 4(%[v1]) \n\t" @@ -321,9 +322,9 @@ static void vector_fmul_reverse_mips(float *dst, const float *src0, const float "mul.s %[temp2], %[temp3], %[temp2] \n\t" "mul.s %[temp4], %[temp5], %[temp4] \n\t" "mul.s %[temp6], %[temp7], %[temp6] \n\t" - "addiu %[src0], %[src0], 16 \n\t" - "addiu %[src1], %[src1], -16 \n\t" - "addiu %[dst], %[dst], 16 \n\t" + PTR_ADDIU "%[src0], %[src0], 16 \n\t" + PTR_ADDIU "%[src1], %[src1], -16 \n\t" + PTR_ADDIU "%[dst], %[dst], 16 \n\t" "swc1 %[temp0], -16(%[dst]) \n\t" "swc1 %[temp2], -12(%[dst]) \n\t" "swc1 %[temp4], -8(%[dst]) \n\t" |