diff options
| author | Diego Biurrun <diego@biurrun.de> | 2011-05-27 21:18:12 +0200 |
|---|---|---|
| committer | Diego Biurrun <diego@biurrun.de> | 2011-05-27 21:18:12 +0200 |
| commit | 5e528cffcf3d2cb1665075649601f4e62c8764e1 (patch) | |
| tree | ce0b3a9c430cd9a309db326592ebc93043f58ad8 /libavcodec/x86 | |
| parent | faf8d3ddfa105d7f107a886c5f3cadf6357d89b6 (diff) | |
x86: Add appropriate ifdefs around certain AVX functions.
nasm versions prior to 2.09 have trouble assembling some of our AVX code.
Protect these sections by preprocessor macros to allow compilation to pass.
Diffstat (limited to 'libavcodec/x86')
| -rw-r--r-- | libavcodec/x86/fft_mmx.asm | 8 | ||||
| -rw-r--r-- | libavcodec/x86/fft_sse.c | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/libavcodec/x86/fft_mmx.asm b/libavcodec/x86/fft_mmx.asm index bd2e8297e7..27276a1a31 100644 --- a/libavcodec/x86/fft_mmx.asm +++ b/libavcodec/x86/fft_mmx.asm @@ -299,6 +299,7 @@ IF%1 mova Z(1), m5 INIT_YMM +%ifdef HAVE_AVX align 16 fft8_avx: mova m0, Z(0) @@ -387,6 +388,7 @@ fft32_interleave_avx: sub r2d, mmsize/4 jg .deint_loop ret +%endif INIT_XMM %define movdqa movaps @@ -532,6 +534,7 @@ DEFINE_ARGS z, w, n, o1, o3 INIT_YMM +%ifdef HAVE_AVX %macro INTERL_AVX 5 vunpckhps %3, %2, %1 vunpcklps %2, %2, %1 @@ -545,6 +548,7 @@ INIT_YMM DECL_PASS pass_avx, PASS_BIG 1 DECL_PASS pass_interleave_avx, PASS_BIG 0 +%endif INIT_XMM @@ -634,8 +638,10 @@ cglobal fft_dispatch%3%2, 2,5,8, z, nbits RET %endmacro ; DECL_FFT +%ifdef HAVE_AVX DECL_FFT 6, _avx DECL_FFT 6, _avx, _interleave +%endif DECL_FFT 5, _sse DECL_FFT 5, _sse, _interleave DECL_FFT 4, _3dn @@ -847,4 +853,6 @@ DECL_IMDCT _sse, POSROTATESHUF INIT_YMM +%ifdef HAVE_AVX DECL_IMDCT _avx, POSROTATESHUF_AVX +%endif diff --git a/libavcodec/x86/fft_sse.c b/libavcodec/x86/fft_sse.c index 5b52988d09..add20dd5b2 100644 --- a/libavcodec/x86/fft_sse.c +++ b/libavcodec/x86/fft_sse.c @@ -22,6 +22,7 @@ #include "libavutil/x86_cpu.h" #include "libavcodec/dsputil.h" #include "fft.h" +#include "config.h" DECLARE_ASM_CONST(16, int, ff_m1m1m1m1)[4] = { 1 << 31, 1 << 31, 1 << 31, 1 << 31 }; @@ -30,10 +31,12 @@ void ff_fft_dispatch_sse(FFTComplex *z, int nbits); void ff_fft_dispatch_interleave_sse(FFTComplex *z, int nbits); void ff_fft_dispatch_interleave_avx(FFTComplex *z, int nbits); +#if HAVE_AVX void ff_fft_calc_avx(FFTContext *s, FFTComplex *z) { ff_fft_dispatch_interleave_avx(z, s->nbits); } +#endif void ff_fft_calc_sse(FFTContext *s, FFTComplex *z) { |