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authorAndreas Rheinhardt <andreas.rheinhardt@outlook.com>2023-09-28 19:57:36 +0200
committerAndreas Rheinhardt <andreas.rheinhardt@outlook.com>2023-10-01 02:25:09 +0200
commit6f7bf64dbca408b700582fb9678f300b14267585 (patch)
tree8180359c7fd1e808592848b10a0eb2ba609fe4ea /libavcodec/arm
parentd9464f3e34e444c4e798ec882dab95bafe5179d5 (diff)
avcodec: Remove DCT, FFT, MDCT and RDFT
They were replaced by TX from libavutil; the tremendous work to get to this point (both creating TX as well as porting the users of the components removed in this commit) was completely performed by Lynne alone. Removing the subsystems from configure may break some command lines, because the --disable-fft etc. options are no longer recognized. Co-authored-by: Lynne <dev@lynne.ee> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
Diffstat (limited to 'libavcodec/arm')
-rw-r--r--libavcodec/arm/Makefile7
-rw-r--r--libavcodec/arm/fft_init_arm.c63
-rw-r--r--libavcodec/arm/fft_neon.S375
-rw-r--r--libavcodec/arm/fft_vfp.S530
-rw-r--r--libavcodec/arm/mdct_neon.S301
-rw-r--r--libavcodec/arm/mdct_vfp.S347
-rw-r--r--libavcodec/arm/rdft_init_arm.c33
-rw-r--r--libavcodec/arm/rdft_neon.S155
-rw-r--r--libavcodec/arm/synth_filter_init_arm.c1
9 files changed, 0 insertions, 1812 deletions
diff --git a/libavcodec/arm/Makefile b/libavcodec/arm/Makefile
index 5d284bdc01..becf316eb6 100644
--- a/libavcodec/arm/Makefile
+++ b/libavcodec/arm/Makefile
@@ -5,7 +5,6 @@ OBJS-$(CONFIG_AC3DSP) += arm/ac3dsp_init_arm.o \
arm/ac3dsp_arm.o
OBJS-$(CONFIG_AUDIODSP) += arm/audiodsp_init_arm.o
OBJS-$(CONFIG_BLOCKDSP) += arm/blockdsp_init_arm.o
-OBJS-$(CONFIG_FFT) += arm/fft_init_arm.o
OBJS-$(CONFIG_FMTCONVERT) += arm/fmtconvert_init_arm.o
OBJS-$(CONFIG_G722DSP) += arm/g722dsp_init_arm.o
OBJS-$(CONFIG_H264CHROMA) += arm/h264chroma_init_arm.o
@@ -25,7 +24,6 @@ OBJS-$(CONFIG_MPEGVIDEO) += arm/mpegvideo_arm.o
OBJS-$(CONFIG_MPEGVIDEOENC) += arm/mpegvideoencdsp_init_arm.o
OBJS-$(CONFIG_NEON_CLOBBER_TEST) += arm/neontest.o
OBJS-$(CONFIG_PIXBLOCKDSP) += arm/pixblockdsp_init_arm.o
-OBJS-$(CONFIG_RDFT) += arm/rdft_init_arm.o
OBJS-$(CONFIG_RV34DSP) += arm/rv34dsp_init_arm.o
OBJS-$(CONFIG_VC1DSP) += arm/vc1dsp_init_arm.o
OBJS-$(CONFIG_VIDEODSP) += arm/videodsp_init_arm.o
@@ -90,9 +88,7 @@ ARMV6-OBJS-$(CONFIG_TRUEHD_DECODER) += arm/mlpdsp_armv6.o
# VFP optimizations
# subsystems
-VFP-OBJS-$(CONFIG_FFT) += arm/fft_vfp.o
VFP-OBJS-$(CONFIG_FMTCONVERT) += arm/fmtconvert_vfp.o
-VFP-OBJS-$(CONFIG_MDCT) += arm/mdct_vfp.o
# decoders/encoders
VFP-OBJS-$(CONFIG_DCA_DECODER) += arm/synth_filter_vfp.o
@@ -107,7 +103,6 @@ NEON-OBJS-$(CONFIG_AUDIODSP) += arm/audiodsp_init_neon.o \
arm/int_neon.o
NEON-OBJS-$(CONFIG_BLOCKDSP) += arm/blockdsp_init_neon.o \
arm/blockdsp_neon.o
-NEON-OBJS-$(CONFIG_FFT) += arm/fft_neon.o
NEON-OBJS-$(CONFIG_FMTCONVERT) += arm/fmtconvert_neon.o
NEON-OBJS-$(CONFIG_G722DSP) += arm/g722dsp_neon.o
NEON-OBJS-$(CONFIG_H264CHROMA) += arm/h264cmc_neon.o
@@ -121,10 +116,8 @@ NEON-OBJS-$(CONFIG_HPELDSP) += arm/hpeldsp_init_neon.o \
NEON-OBJS-$(CONFIG_IDCTDSP) += arm/idctdsp_init_neon.o \
arm/idctdsp_neon.o \
arm/simple_idct_neon.o
-NEON-OBJS-$(CONFIG_MDCT) += arm/mdct_neon.o
NEON-OBJS-$(CONFIG_MPEGVIDEO) += arm/mpegvideo_neon.o
NEON-OBJS-$(CONFIG_PIXBLOCKDSP) += arm/pixblockdsp_neon.o
-NEON-OBJS-$(CONFIG_RDFT) += arm/rdft_neon.o
NEON-OBJS-$(CONFIG_VC1DSP) += arm/vc1dsp_init_neon.o \
arm/vc1dsp_neon.o
NEON-OBJS-$(CONFIG_VP3DSP) += arm/vp3dsp_neon.o
diff --git a/libavcodec/arm/fft_init_arm.c b/libavcodec/arm/fft_init_arm.c
deleted file mode 100644
index 8ae22dfb4e..0000000000
--- a/libavcodec/arm/fft_init_arm.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/attributes.h"
-#include "libavutil/cpu.h"
-#include "libavutil/arm/cpu.h"
-
-#include "libavcodec/fft.h"
-
-void ff_fft_calc_vfp(FFTContext *s, FFTComplex *z);
-
-void ff_fft_permute_neon(FFTContext *s, FFTComplex *z);
-void ff_fft_calc_neon(FFTContext *s, FFTComplex *z);
-
-void ff_imdct_half_vfp(FFTContext *s, FFTSample *output, const FFTSample *input);
-
-void ff_imdct_calc_neon(FFTContext *s, FFTSample *output, const FFTSample *input);
-void ff_imdct_half_neon(FFTContext *s, FFTSample *output, const FFTSample *input);
-void ff_mdct_calc_neon(FFTContext *s, FFTSample *output, const FFTSample *input);
-
-av_cold void ff_fft_init_arm(FFTContext *s)
-{
- int cpu_flags = av_get_cpu_flags();
-
- if (have_vfp_vm(cpu_flags)) {
- s->fft_calc = ff_fft_calc_vfp;
-#if CONFIG_MDCT
- s->imdct_half = ff_imdct_half_vfp;
-#endif
- }
-
- if (have_neon(cpu_flags)) {
-#if CONFIG_FFT
- if (s->nbits < 17) {
- s->fft_permute = ff_fft_permute_neon;
- s->fft_calc = ff_fft_calc_neon;
- }
-#endif
-#if CONFIG_MDCT
- s->imdct_calc = ff_imdct_calc_neon;
- s->imdct_half = ff_imdct_half_neon;
- s->mdct_calc = ff_mdct_calc_neon;
- s->mdct_permutation = FF_MDCT_PERM_INTERLEAVE;
-#endif
- }
-}
diff --git a/libavcodec/arm/fft_neon.S b/libavcodec/arm/fft_neon.S
deleted file mode 100644
index 48f8dfc424..0000000000
--- a/libavcodec/arm/fft_neon.S
+++ /dev/null
@@ -1,375 +0,0 @@
-/*
- * ARM NEON optimised FFT
- *
- * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
- * Copyright (c) 2009 Naotoshi Nojiri
- *
- * This algorithm (though not any of the implementation details) is
- * based on libdjbfft by D. J. Bernstein.
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/arm/asm.S"
-
-#define M_SQRT1_2 0.70710678118654752440
-
-
-function fft4_neon
- vld1.32 {d0-d3}, [r0,:128]
-
- vext.32 q8, q1, q1, #1 @ i2,r3 d3=i3,r2
- vsub.f32 d6, d0, d1 @ r0-r1,i0-i1
- vsub.f32 d7, d16, d17 @ r3-r2,i2-i3
- vadd.f32 d4, d0, d1 @ r0+r1,i0+i1
- vadd.f32 d5, d2, d3 @ i2+i3,r2+r3
- vadd.f32 d1, d6, d7
- vsub.f32 d3, d6, d7
- vadd.f32 d0, d4, d5
- vsub.f32 d2, d4, d5
-
- vst1.32 {d0-d3}, [r0,:128]
-
- bx lr
-endfunc
-
-function fft8_neon
- mov r1, r0
- vld1.32 {d0-d3}, [r1,:128]!
- vld1.32 {d16-d19}, [r1,:128]
-
- movw r2, #0x04f3 @ sqrt(1/2)
- movt r2, #0x3f35
- eor r3, r2, #1<<31
- vdup.32 d31, r2
-
- vext.32 q11, q1, q1, #1 @ i2,r3,i3,r2
- vadd.f32 d4, d16, d17 @ r4+r5,i4+i5
- vmov d28, r3, r2
- vadd.f32 d5, d18, d19 @ r6+r7,i6+i7
- vsub.f32 d17, d16, d17 @ r4-r5,i4-i5
- vsub.f32 d19, d18, d19 @ r6-r7,i6-i7
- vrev64.32 d29, d28
- vadd.f32 d20, d0, d1 @ r0+r1,i0+i1
- vadd.f32 d21, d2, d3 @ r2+r3,i2+i3
- vmul.f32 d26, d17, d28 @ -a2r*w,a2i*w
- vext.32 q3, q2, q2, #1
- vmul.f32 d27, d19, d29 @ a3r*w,-a3i*w
- vsub.f32 d23, d22, d23 @ i2-i3,r3-r2
- vsub.f32 d22, d0, d1 @ r0-r1,i0-i1
- vmul.f32 d24, d17, d31 @ a2r*w,a2i*w
- vmul.f32 d25, d19, d31 @ a3r*w,a3i*w
- vadd.f32 d0, d20, d21
- vsub.f32 d2, d20, d21
- vadd.f32 d1, d22, d23
- vrev64.32 q13, q13
- vsub.f32 d3, d22, d23
- vsub.f32 d6, d6, d7
- vadd.f32 d24, d24, d26 @ a2r+a2i,a2i-a2r t1,t2
- vadd.f32 d25, d25, d27 @ a3r-a3i,a3i+a3r t5,t6
- vadd.f32 d7, d4, d5
- vsub.f32 d18, d2, d6
- vext.32 q13, q12, q12, #1
- vadd.f32 d2, d2, d6
- vsub.f32 d16, d0, d7
- vadd.f32 d5, d25, d24
- vsub.f32 d4, d26, d27
- vadd.f32 d0, d0, d7
- vsub.f32 d17, d1, d5
- vsub.f32 d19, d3, d4
- vadd.f32 d3, d3, d4
- vadd.f32 d1, d1, d5
-
- vst1.32 {d16-d19}, [r1,:128]
- vst1.32 {d0-d3}, [r0,:128]
-
- bx lr
-endfunc
-
-function fft16_neon
- movrel r1, mppm
- vld1.32 {d16-d19}, [r0,:128]! @ q8{r0,i0,r1,i1} q9{r2,i2,r3,i3}
- pld [r0, #32]
- vld1.32 {d2-d3}, [r1,:128]
- vext.32 q13, q9, q9, #1
- vld1.32 {d22-d25}, [r0,:128]! @ q11{r4,i4,r5,i5} q12{r6,i5,r7,i7}
- vadd.f32 d4, d16, d17
- vsub.f32 d5, d16, d17
- vadd.f32 d18, d18, d19
- vsub.f32 d19, d26, d27
-
- vadd.f32 d20, d22, d23
- vsub.f32 d22, d22, d23
- vsub.f32 d23, d24, d25
- vadd.f32 q8, q2, q9 @ {r0,i0,r1,i1}
- vadd.f32 d21, d24, d25
- vmul.f32 d24, d22, d2
- vsub.f32 q9, q2, q9 @ {r2,i2,r3,i3}
- vmul.f32 d25, d23, d3
- vuzp.32 d16, d17 @ {r0,r1,i0,i1}
- vmul.f32 q1, q11, d2[1]
- vuzp.32 d18, d19 @ {r2,r3,i2,i3}
- vrev64.32 q12, q12
- vadd.f32 q11, q12, q1 @ {t1a,t2a,t5,t6}
- vld1.32 {d24-d27}, [r0,:128]! @ q12{r8,i8,r9,i9} q13{r10,i10,r11,i11}
- vzip.32 q10, q11
- vld1.32 {d28-d31}, [r0,:128] @ q14{r12,i12,r13,i13} q15{r14,i14,r15,i15}
- vadd.f32 d0, d22, d20
- vadd.f32 d1, d21, d23
- vsub.f32 d2, d21, d23
- vsub.f32 d3, d22, d20
- sub r0, r0, #96
- vext.32 q13, q13, q13, #1
- vsub.f32 q10, q8, q0 @ {r4,r5,i4,i5}
- vadd.f32 q8, q8, q0 @ {r0,r1,i0,i1}
- vext.32 q15, q15, q15, #1
- vsub.f32 q11, q9, q1 @ {r6,r7,i6,i7}
- vswp d25, d26 @ q12{r8,i8,i10,r11} q13{r9,i9,i11,r10}
- vadd.f32 q9, q9, q1 @ {r2,r3,i2,i3}
- vswp d29, d30 @ q14{r12,i12,i14,r15} q15{r13,i13,i15,r14}
- vadd.f32 q0, q12, q13 @ {t1,t2,t5,t6}
- vadd.f32 q1, q14, q15 @ {t1a,t2a,t5a,t6a}
- movrelx r2, X(ff_cos_16)
- vsub.f32 q13, q12, q13 @ {t3,t4,t7,t8}
- vrev64.32 d1, d1
- vsub.f32 q15, q14, q15 @ {t3a,t4a,t7a,t8a}
- vrev64.32 d3, d3
- movrel r3, pmmp
- vswp d1, d26 @ q0{t1,t2,t3,t4} q13{t6,t5,t7,t8}
- vswp d3, d30 @ q1{t1a,t2a,t3a,t4a} q15{t6a,t5a,t7a,t8a}
- vadd.f32 q12, q0, q13 @ {r8,i8,r9,i9}
- vadd.f32 q14, q1, q15 @ {r12,i12,r13,i13}
- vld1.32 {d4-d5}, [r2,:64]
- vsub.f32 q13, q0, q13 @ {r10,i10,r11,i11}
- vsub.f32 q15, q1, q15 @ {r14,i14,r15,i15}
- vswp d25, d28 @ q12{r8,i8,r12,i12} q14{r9,i9,r13,i13}
- vld1.32 {d6-d7}, [r3,:128]
- vrev64.32 q1, q14
- vmul.f32 q14, q14, d4[1]
- vmul.f32 q1, q1, q3
- vmla.f32 q14, q1, d5[1] @ {t1a,t2a,t5a,t6a}
- vswp d27, d30 @ q13{r10,i10,r14,i14} q15{r11,i11,r15,i15}
- vzip.32 q12, q14
- vadd.f32 d0, d28, d24
- vadd.f32 d1, d25, d29
- vsub.f32 d2, d25, d29
- vsub.f32 d3, d28, d24
- vsub.f32 q12, q8, q0 @ {r8,r9,i8,i9}
- vadd.f32 q8, q8, q0 @ {r0,r1,i0,i1}
- vsub.f32 q14, q10, q1 @ {r12,r13,i12,i13}
- mov r1, #32
- vadd.f32 q10, q10, q1 @ {r4,r5,i4,i5}
- vrev64.32 q0, q13
- vmul.f32 q13, q13, d5[0]
- vrev64.32 q1, q15
- vmul.f32 q15, q15, d5[1]
- vst2.32 {d16-d17},[r0,:128], r1
- vmul.f32 q0, q0, q3
- vst2.32 {d20-d21},[r0,:128], r1
- vmul.f32 q1, q1, q3
- vmla.f32 q13, q0, d5[0] @ {t1,t2,t5,t6}
- vmla.f32 q15, q1, d4[1] @ {t1a,t2a,t5a,t6a}
- vst2.32 {d24-d25},[r0,:128], r1
- vst2.32 {d28-d29},[r0,:128]
- vzip.32 q13, q15
- sub r0, r0, #80
- vadd.f32 d0, d30, d26
- vadd.f32 d1, d27, d31
- vsub.f32 d2, d27, d31
- vsub.f32 d3, d30, d26
- vsub.f32 q13, q9, q0 @ {r10,r11,i10,i11}
- vadd.f32 q9, q9, q0 @ {r2,r3,i2,i3}
- vsub.f32 q15, q11, q1 @ {r14,r15,i14,i15}
- vadd.f32 q11, q11, q1 @ {r6,r7,i6,i7}
- vst2.32 {d18-d19},[r0,:128], r1
- vst2.32 {d22-d23},[r0,:128], r1
- vst2.32 {d26-d27},[r0,:128], r1
- vst2.32 {d30-d31},[r0,:128]
- bx lr
-endfunc
-
-function fft_pass_neon
- push {r4-r6,lr}
- mov r6, r2 @ n
- lsl r5, r2, #3 @ 2 * n * sizeof FFTSample
- lsl r4, r2, #4 @ 2 * n * sizeof FFTComplex
- lsl r2, r2, #5 @ 4 * n * sizeof FFTComplex
- add r3, r2, r4
- add r4, r4, r0 @ &z[o1]
- add r2, r2, r0 @ &z[o2]
- add r3, r3, r0 @ &z[o3]
- vld1.32 {d20-d21},[r2,:128] @ {z[o2],z[o2+1]}
- movrel r12, pmmp
- vld1.32 {d22-d23},[r3,:128] @ {z[o3],z[o3+1]}
- add r5, r5, r1 @ wim
- vld1.32 {d6-d7}, [r12,:128] @ pmmp
- vswp d21, d22
- vld1.32 {d4}, [r1,:64]! @ {wre[0],wre[1]}
- sub r5, r5, #4 @ wim--
- vrev64.32 q1, q11
- vmul.f32 q11, q11, d4[1]
- vmul.f32 q1, q1, q3
- vld1.32 {d5[0]}, [r5,:32] @ d5[0] = wim[-1]
- vmla.f32 q11, q1, d5[0] @ {t1a,t2a,t5a,t6a}
- vld2.32 {d16-d17},[r0,:128] @ {z[0],z[1]}
- sub r6, r6, #1 @ n--
- vld2.32 {d18-d19},[r4,:128] @ {z[o1],z[o1+1]}
- vzip.32 q10, q11
- vadd.f32 d0, d22, d20
- vadd.f32 d1, d21, d23
- vsub.f32 d2, d21, d23
- vsub.f32 d3, d22, d20
- vsub.f32 q10, q8, q0
- vadd.f32 q8, q8, q0
- vsub.f32 q11, q9, q1
- vadd.f32 q9, q9, q1
- vst2.32 {d20-d21},[r2,:128]! @ {z[o2],z[o2+1]}
- vst2.32 {d16-d17},[r0,:128]! @ {z[0],z[1]}
- vst2.32 {d22-d23},[r3,:128]! @ {z[o3],z[o3+1]}
- vst2.32 {d18-d19},[r4,:128]! @ {z[o1],z[o1+1]}
- sub r5, r5, #8 @ wim -= 2
-1:
- vld1.32 {d20-d21},[r2,:128] @ {z[o2],z[o2+1]}
- vld1.32 {d22-d23},[r3,:128] @ {z[o3],z[o3+1]}
- vswp d21, d22
- vld1.32 {d4}, [r1]! @ {wre[0],wre[1]}
- vrev64.32 q0, q10
- vmul.f32 q10, q10, d4[0]
- vrev64.32 q1, q11
- vmul.f32 q11, q11, d4[1]
- vld1.32 {d5}, [r5] @ {wim[-1],wim[0]}
- vmul.f32 q0, q0, q3
- sub r5, r5, #8 @ wim -= 2
- vmul.f32 q1, q1, q3
- vmla.f32 q10, q0, d5[1] @ {t1,t2,t5,t6}
- vmla.f32 q11, q1, d5[0] @ {t1a,t2a,t5a,t6a}
- vld2.32 {d16-d17},[r0,:128] @ {z[0],z[1]}
- subs r6, r6, #1 @ n--
- vld2.32 {d18-d19},[r4,:128] @ {z[o1],z[o1+1]}
- vzip.32 q10, q11
- vadd.f32 d0, d22, d20
- vadd.f32 d1, d21, d23
- vsub.f32 d2, d21, d23
- vsub.f32 d3, d22, d20
- vsub.f32 q10, q8, q0
- vadd.f32 q8, q8, q0
- vsub.f32 q11, q9, q1
- vadd.f32 q9, q9, q1
- vst2.32 {d20-d21}, [r2,:128]! @ {z[o2],z[o2+1]}
- vst2.32 {d16-d17}, [r0,:128]! @ {z[0],z[1]}
- vst2.32 {d22-d23}, [r3,:128]! @ {z[o3],z[o3+1]}
- vst2.32 {d18-d19}, [r4,:128]! @ {z[o1],z[o1+1]}
- bne 1b
-
- pop {r4-r6,pc}
-endfunc
-
-.macro def_fft n, n2, n4
- .align 6
-function fft\n\()_neon
- push {r4, lr}
- mov r4, r0
- bl fft\n2\()_neon
- add r0, r4, #\n4*2*8
- bl fft\n4\()_neon
- add r0, r4, #\n4*3*8
- bl fft\n4\()_neon
- mov r0, r4
- pop {r4, lr}
- movrelx r1, X(ff_cos_\n)
- mov r2, #\n4/2
- b fft_pass_neon
-endfunc
-.endm
-
- def_fft 32, 16, 8
- def_fft 64, 32, 16
- def_fft 128, 64, 32
- def_fft 256, 128, 64
- def_fft 512, 256, 128
- def_fft 1024, 512, 256
- def_fft 2048, 1024, 512
- def_fft 4096, 2048, 1024
- def_fft 8192, 4096, 2048
- def_fft 16384, 8192, 4096
- def_fft 32768, 16384, 8192
- def_fft 65536, 32768, 16384
-
-function ff_fft_calc_neon, export=1
- ldr r2, [r0]
- sub r2, r2, #2
- movrel r3, fft_tab_neon
- ldr r3, [r3, r2, lsl #2]
- mov r0, r1
- bx r3
-endfunc
-
-function ff_fft_permute_neon, export=1
- push {r4,lr}
- mov r12, #1
- ldr r2, [r0] @ nbits
- ldr r3, [r0, #12] @ tmp_buf
- ldr r0, [r0, #8] @ revtab
- lsl r12, r12, r2
- mov r2, r12
-1:
- vld1.32 {d0-d1}, [r1,:128]!
- ldr r4, [r0], #4
- uxth lr, r4
- uxth r4, r4, ror #16
- add lr, r3, lr, lsl #3
- add r4, r3, r4, lsl #3
- vst1.32 {d0}, [lr,:64]
- vst1.32 {d1}, [r4,:64]
- subs r12, r12, #2
- bgt 1b
-
- sub r1, r1, r2, lsl #3
-1:
- vld1.32 {d0-d3}, [r3,:128]!
- vst1.32 {d0-d3}, [r1,:128]!
- subs r2, r2, #4
- bgt 1b
-
- pop {r4,pc}
-endfunc
-
-const fft_tab_neon, relocate=1
- .word fft4_neon
- .word fft8_neon
- .word fft16_neon
- .word fft32_neon
- .word fft64_neon
- .word fft128_neon
- .word fft256_neon
- .word fft512_neon
- .word fft1024_neon
- .word fft2048_neon
- .word fft4096_neon
- .word fft8192_neon
- .word fft16384_neon
- .word fft32768_neon
- .word fft65536_neon
-endconst
-
-const pmmp, align=4
- .float +1.0, -1.0, -1.0, +1.0
-endconst
-
-const mppm, align=4
- .float -M_SQRT1_2, M_SQRT1_2, M_SQRT1_2, -M_SQRT1_2
-endconst
diff --git a/libavcodec/arm/fft_vfp.S b/libavcodec/arm/fft_vfp.S
deleted file mode 100644
index ac601325f2..0000000000
--- a/libavcodec/arm/fft_vfp.S
+++ /dev/null
@@ -1,530 +0,0 @@
-/*
- * Copyright (c) 2013 RISC OS Open Ltd
- * Author: Ben Avison <bavison@riscosopen.org>
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/arm/asm.S"
-
-@ The fftx_internal_vfp versions of the functions obey a modified AAPCS:
-@ VFP is in RunFast mode, vector length 4, stride 1 thoroughout, and
-@ all single-precision VFP registers may be corrupted on exit. The a2
-@ register may not be clobbered in these functions, as it holds the
-@ stored original FPSCR.
-
-function ff_fft_calc_vfp, export=1
- ldr ip, [a1, #0] @ nbits
- mov a1, a2
- movrel a2, (fft_tab_vfp - 8)
- ldr pc, [a2, ip, lsl #2]
-endfunc
-const fft_tab_vfp, relocate=1
- .word fft4_vfp
- .word fft8_vfp
- .word X(ff_fft16_vfp) @ this one alone is exported
- .word fft32_vfp
- .word fft64_vfp
- .word fft128_vfp
- .word fft256_vfp
- .word fft512_vfp
- .word fft1024_vfp
- .word fft2048_vfp
- .word fft4096_vfp
- .word fft8192_vfp
- .word fft16384_vfp
- .word fft32768_vfp
- .word fft65536_vfp
-endconst
-
-function fft4_vfp
- vldr d0, [a1, #0*2*4] @ s0,s1 = z[0]
- vldr d4, [a1, #1*2*4] @ s8,s9 = z[1]
- vldr d1, [a1, #2*2*4] @ s2,s3 = z[2]
- vldr d5, [a1, #3*2*4] @ s10,s11 = z[3]
- @ stall
- vadd.f s12, s0, s8 @ i0
- vadd.f s13, s1, s9 @ i1
- vadd.f s14, s2, s10 @ i2
- vadd.f s15, s3, s11 @ i3
- vsub.f s8, s0, s8 @ i4
- vsub.f s9, s1, s9 @ i5
- vsub.f s10, s2, s10 @ i6
- vsub.f s11, s3, s11 @ i7
- @ stall
- @ stall
- vadd.f s0, s12, s14 @ z[0].re
- vsub.f s4, s12, s14 @ z[2].re
- vadd.f s1, s13, s15 @ z[0].im
- vsub.f s5, s13, s15 @ z[2].im
- vadd.f s7, s9, s10 @ z[3].im
- vsub.f s3, s9, s10 @ z[1].im
- vadd.f s2, s8, s11 @ z[1].re
- vsub.f s6, s8, s11 @ z[3].re
- @ stall
- @ stall
- vstr d0, [a1, #0*2*4]
- vstr d2, [a1, #2*2*4]
- @ stall
- @ stall
- vstr d1, [a1, #1*2*4]
- vstr d3, [a1, #3*2*4]
-
- bx lr
-endfunc
-
-.macro macro_fft8_head
- @ FFT4
- vldr d4, [a1, #0 * 2*4]
- vldr d6, [a1, #1 * 2*4]
- vldr d5, [a1, #2 * 2*4]
- vldr d7, [a1, #3 * 2*4]
- @ BF
- vldr d12, [a1, #4 * 2*4]
- vadd.f s16, s8, s12 @ vector op
- vldr d14, [a1, #5 * 2*4]
- vldr d13, [a1, #6 * 2*4]
- vldr d15, [a1, #7 * 2*4]
- vsub.f s20, s8, s12 @ vector op
- vadd.f s0, s16, s18
- vsub.f s2, s16, s18
- vadd.f s1, s17, s19
- vsub.f s3, s17, s19
- vadd.f s7, s21, s22
- vsub.f s5, s21, s22
- vadd.f s4, s20, s23
- vsub.f s6, s20, s23
- vsub.f s20, s24, s28 @ vector op
- vstr d0, [a1, #0 * 2*4] @ transfer s0-s7 to s24-s31 via memory
- vstr d1, [a1, #1 * 2*4]
- vldr s0, cos1pi4
- vadd.f s16, s24, s28 @ vector op
- vstr d2, [a1, #2 * 2*4]
- vstr d3, [a1, #3 * 2*4]
- vldr d12, [a1, #0 * 2*4]
- @ TRANSFORM
- vmul.f s20, s20, s0 @ vector x scalar op
- vldr d13, [a1, #1 * 2*4]
- vldr d14, [a1, #2 * 2*4]
- vldr d15, [a1, #3 * 2*4]
- @ BUTTERFLIES
- vadd.f s0, s18, s16
- vadd.f s1, s17, s19
- vsub.f s2, s17, s19
- vsub.f s3, s18, s16
- vadd.f s4, s21, s20
- vsub.f s5, s21, s20
- vadd.f s6, s22, s23
- vsub.f s7, s22, s23
- vadd.f s8, s0, s24 @ vector op
- vstr d0, [a1, #0 * 2*4] @ transfer s0-s3 to s12-s15 via memory
- vstr d1, [a1, #1 * 2*4]
- vldr d6, [a1, #0 * 2*4]
- vldr d7, [a1, #1 * 2*4]
- vadd.f s1, s5, s6
- vadd.f s0, s7, s4
- vsub.f s2, s5, s6
- vsub.f s3, s7, s4
- vsub.f s12, s24, s12 @ vector op
- vsub.f s5, s29, s1
- vsub.f s4, s28, s0
- vsub.f s6, s30, s2
- vsub.f s7, s31, s3
- vadd.f s16, s0, s28 @ vector op
- vstr d6, [a1, #4 * 2*4]
- vstr d7, [a1, #6 * 2*4]
- vstr d4, [a1, #0 * 2*4]
- vstr d5, [a1, #2 * 2*4]
- vstr d2, [a1, #5 * 2*4]
- vstr d3, [a1, #7 * 2*4]
-.endm
-
-.macro macro_fft8_tail
- vstr d8, [a1, #1 * 2*4]
- vstr d9, [a1, #3 * 2*4]
-.endm
-
-function .Lfft8_internal_vfp
- macro_fft8_head
- macro_fft8_tail
- bx lr
-endfunc
-
-function fft8_vfp
- ldr a3, =0x03030000 @ RunFast mode, vector length 4, stride 1
- fmrx a2, FPSCR
- fmxr FPSCR, a3
- vpush {s16-s31}
- mov ip, lr
- bl .Lfft8_internal_vfp
- vpop {s16-s31}
- fmxr FPSCR, a2
- bx ip
-endfunc
-
-.align 3
-cos1pi4: @ cos(1*pi/4) = sqrt(2)
- .float 0.707106769084930419921875
-cos1pi8: @ cos(1*pi/8) = sqrt(2+sqrt(2))/2
- .float 0.92387950420379638671875
-cos3pi8: @ cos(2*pi/8) = sqrt(2-sqrt(2))/2
- .float 0.3826834261417388916015625
-
-function .Lfft16_internal_vfp
- macro_fft8_head
- @ FFT4(z+8)
- vldr d10, [a1, #8 * 2*4]
- vldr d12, [a1, #9 * 2*4]
- vldr d11, [a1, #10 * 2*4]
- vldr d13, [a1, #11 * 2*4]
- macro_fft8_tail
- vadd.f s16, s20, s24 @ vector op
- @ FFT4(z+12)
- vldr d4, [a1, #12 * 2*4]
- vldr d6, [a1, #13 * 2*4]
- vldr d5, [a1, #14 * 2*4]
- vsub.f s20, s20, s24 @ vector op
- vldr d7, [a1, #15 * 2*4]
- vadd.f s0, s16, s18
- vsub.f s4, s16, s18
- vadd.f s1, s17, s19
- vsub.f s5, s17, s19
- vadd.f s7, s21, s22
- vsub.f s3, s21, s22
- vadd.f s2, s20, s23
- vsub.f s6, s20, s23
- vadd.f s16, s8, s12 @ vector op
- vstr d0, [a1, #8 * 2*4]
- vstr d2, [a1, #10 * 2*4]
- vstr d1, [a1, #9 * 2*4]
- vsub.f s20, s8, s12
- vstr d3, [a1, #11 * 2*4]
- @ TRANSFORM(z[2],z[6],z[10],z[14],cos1pi4,cos1pi4)
- vldr d12, [a1, #10 * 2*4]
- vadd.f s0, s16, s18
- vadd.f s1, s17, s19
- vsub.f s6, s16, s18
- vsub.f s7, s17, s19
- vsub.f s3, s21, s22
- vadd.f s2, s20, s23
- vadd.f s5, s21, s22
- vsub.f s4, s20, s23
- vstr d0, [a1, #12 * 2*4]
- vmov s0, s6
- @ TRANSFORM(z[1],z[5],z[9],z[13],cos1pi8,cos3pi8)
- vldr d6, [a1, #9 * 2*4]
- vstr d1, [a1, #13 * 2*4]
- vldr d1, cos1pi4 @ s2 = cos1pi4, s3 = cos1pi8
- vstr d2, [a1, #15 * 2*4]
- vldr d7, [a1, #13 * 2*4]
- vadd.f s4, s25, s24
- vsub.f s5, s25, s24
- vsub.f s6, s0, s7
- vadd.f s7, s0, s7
- vmul.f s20, s12, s3 @ vector op
- @ TRANSFORM(z[3],z[7],z[11],z[15],cos3pi8,cos1pi8)
- vldr d4, [a1, #11 * 2*4]
- vldr d5, [a1, #15 * 2*4]
- vldr s1, cos3pi8
- vmul.f s24, s4, s2 @ vector * scalar op
- vmul.f s28, s12, s1 @ vector * scalar op
- vmul.f s12, s8, s1 @ vector * scalar op
- vadd.f s4, s20, s29
- vsub.f s5, s21, s28
- vsub.f s6, s22, s31
- vadd.f s7, s23, s30
- vmul.f s8, s8, s3 @ vector * scalar op
- vldr d8, [a1, #1 * 2*4]
- vldr d9, [a1, #5 * 2*4]
- vldr d10, [a1, #3 * 2*4]
- vldr d11, [a1, #7 * 2*4]
- vldr d14, [a1, #2 * 2*4]
- vadd.f s0, s6, s4
- vadd.f s1, s5, s7
- vsub.f s2, s5, s7
- vsub.f s3, s6, s4
- vadd.f s4, s12, s9
- vsub.f s5, s13, s8
- vsub.f s6, s14, s11
- vadd.f s7, s15, s10
- vadd.f s12, s0, s16 @ vector op
- vstr d0, [a1, #1 * 2*4]
- vstr d1, [a1, #5 * 2*4]
- vldr d4, [a1, #1 * 2*4]
- vldr d5, [a1, #5 * 2*4]
- vadd.f s0, s6, s4
- vadd.f s1, s5, s7
- vsub.f s2, s5, s7
- vsub.f s3, s6, s4
- vsub.f s8, s16, s8 @ vector op
- vstr d6, [a1, #1 * 2*4]
- vstr d7, [a1, #5 * 2*4]
- vldr d15, [a1, #6 * 2*4]
- vsub.f s4, s20, s0
- vsub.f s5, s21, s1
- vsub.f s6, s22, s2
- vsub.f s7, s23, s3
- vadd.f s20, s0, s20 @ vector op
- vstr d4, [a1, #9 * 2*4]
- @ TRANSFORM_ZERO(z[0],z[4],z[8],z[12])
- vldr d6, [a1, #8 * 2*4]
- vstr d5, [a1, #13 * 2*4]
- vldr d7, [a1, #12 * 2*4]
- vstr d2, [a1, #11 * 2*4]
- vldr d8, [a1, #0 * 2*4]
- vstr d3, [a1, #15 * 2*4]
- vldr d9, [a1, #4 * 2*4]
- vadd.f s0, s26, s24
- vadd.f s1, s25, s27
- vsub.f s2, s25, s27
- vsub.f s3, s26, s24
- vadd.f s4, s14, s12
- vadd.f s5, s13, s15
- vsub.f s6, s13, s15
- vsub.f s7, s14, s12
- vadd.f s8, s0, s28 @ vector op
- vstr d0, [a1, #3 * 2*4]
- vstr d1, [a1, #7 * 2*4]
- vldr d6, [a1, #3 * 2*4]
- vldr d7, [a1, #7 * 2*4]
- vsub.f s0, s16, s4
- vsub.f s1, s17, s5
- vsub.f s2, s18, s6
- vsub.f s3, s19, s7
- vsub.f s12, s28, s12 @ vector op
- vadd.f s16, s4, s16 @ vector op
- vstr d10, [a1, #3 * 2*4]
- vstr d11, [a1, #7 * 2*4]
- vstr d4, [a1, #2 * 2*4]
- vstr d5, [a1, #6 * 2*4]
- vstr d0, [a1, #8 * 2*4]
- vstr d1, [a1, #12 * 2*4]
- vstr d6, [a1, #10 * 2*4]
- vstr d7, [a1, #14 * 2*4]
- vstr d8, [a1, #0 * 2*4]
- vstr d9, [a1, #4 * 2*4]
-
- bx lr
-endfunc
-
-function ff_fft16_vfp, export=1
- ldr a3, =0x03030000 @ RunFast mode, vector length 4, stride 1
- fmrx a2, FPSCR
- fmxr FPSCR, a3
- vpush {s16-s31}
- mov ip, lr
- bl .Lfft16_internal_vfp
- vpop {s16-s31}
- fmxr FPSCR, a2
- bx ip
-endfunc
-
-.macro pass n, z0, z1, z2, z3
- add v6, v5, #4*2*\n
- @ TRANSFORM_ZERO(z[0],z[o1],z[o2],z[o3])
- @ TRANSFORM(z[1],z[o1+1],z[o2+1],z[o3+1],wre[1],wim[-1])
- @ TRANSFORM(z[0],z[o1],z[o2],z[o3],wre[0],wim[0])
- @ TRANSFORM(z[1],z[o1+1],z[o2+1],z[o3+1],wre[1],wim[-1])
- vldr d8, [\z2, #8*(o2+1)] @ s16,s17
- vldmdb v6!, {s2}
- vldr d9, [\z3, #8*(o3+1)] @ s18,s19
- vldmia v5!, {s0,s1} @ s0 is unused
- vldr s7, [\z2, #8*o2] @ t1
- vmul.f s20, s16, s2 @ vector * scalar
- vldr s0, [\z3, #8*o3] @ t5
- vldr s6, [\z2, #8*o2+4] @ t2
- vldr s3, [\z3, #8*o3+4] @ t6
- vmul.f s16, s16, s1 @ vector * scalar
- ldr a4, =\n-1
-1: add \z0, \z0, #8*2
- .if \n*4*2 >= 512
- add \z1, \z1, #8*2
- .endif
- .if \n*4*2 >= 256
- add \z2, \z2, #8*2
- .endif
- .if \n*4*2 >= 512
- add \z3, \z3, #8*2
- .endif
- @ up to 2 stalls (VFP vector issuing / waiting for s0)
- @ depending upon whether this is the first iteration and
- @ how many add instructions are inserted above
- vadd.f s4, s0, s7 @ t5
- vadd.f s5, s6, s3 @ t6
- vsub.f s6, s6, s3 @ t4
- vsub.f s7, s0, s7 @ t3
- vldr d6, [\z0, #8*0-8*2] @ s12,s13
- vadd.f s0, s16, s21 @ t1
- vldr d7, [\z1, #8*o1-8*2] @ s14,s15
- vsub.f s1, s18, s23 @ t5
- vadd.f s8, s4, s12 @ vector + vector
- @ stall (VFP vector issuing)
- @ stall (VFP vector issuing)
- @ stall (VFP vector issuing)
- vsub.f s4, s12, s4
- vsub.f s5, s13, s5
- vsub.f s6, s14, s6
- vsub.f s7, s15, s7
- vsub.f s2, s17, s20 @ t2
- vadd.f s3, s19, s22 @ t6
- vstr d4, [\z0, #8*0-8*2] @ s8,s9
- vstr d5, [\z1, #8*o1-8*2] @ s10,s11
- @ stall (waiting for s5)
- vstr d2, [\z2, #8*o2-8*2] @ s4,s5
- vadd.f s4, s1, s0 @ t5
- vstr d3, [\z3, #8*o3-8*2] @ s6,s7
- vsub.f s7, s1, s0 @ t3
- vadd.f s5, s2, s3 @ t6
- vsub.f s6, s2, s3 @ t4
- vldr d6, [\z0, #8*1-8*2] @ s12,s13
- vldr d7, [\z1, #8*(o1+1)-8*2] @ s14,s15
- vldr d4, [\z2, #8*o2] @ s8,s9
- vldmdb v6!, {s2,s3}
- vldr d5, [\z3, #8*o3] @ s10,s11
- vadd.f s20, s4, s12 @ vector + vector
- vldmia v5!, {s0,s1}
- vldr d8, [\z2, #8*(o2+1)] @ s16,s17
- @ stall (VFP vector issuing)
- vsub.f s4, s12, s4
- vsub.f s5, s13, s5
- vsub.f s6, s14, s6
- vsub.f s7, s15, s7
- vmul.f s12, s8, s3 @ vector * scalar
- vstr d10, [\z0, #8*1-8*2] @ s20,s21
- vldr d9, [\z3, #8*(o3+1)] @ s18,s19
- vstr d11, [\z1, #8*(o1+1)-8*2] @ s22,s23
- vmul.f s8, s8, s0 @ vector * scalar
- vstr d2, [\z2, #8*(o2+1)-8*2] @ s4,s5
- @ stall (waiting for s7)
- vstr d3, [\z3, #8*(o3+1)-8*2] @ s6,s7
- vmul.f s20, s16, s2 @ vector * scalar
- @ stall (VFP vector issuing)
- @ stall (VFP vector issuing)
- @ stall (VFP vector issuing)
- vadd.f s7, s8, s13 @ t1
- vsub.f s6, s9, s12 @ t2
- vsub.f s0, s10, s15 @ t5
- vadd.f s3, s11, s14 @ t6
- vmul.f s16, s16, s1 @ vector * scalar
- subs a4, a4, #1
- bne 1b
- @ What remains is identical to the first two indentations of
- @ the above, but without the increment of z
- vadd.f s4, s0, s7 @ t5
- vadd.f s5, s6, s3 @ t6
- vsub.f s6, s6, s3 @ t4
- vsub.f s7, s0, s7 @ t3
- vldr d6, [\z0, #8*0] @ s12,s13
- vadd.f s0, s16, s21 @ t1
- vldr d7, [\z1, #8*o1] @ s14,s15
- vsub.f s1, s18, s23 @ t5
- vadd.f s8, s4, s12 @ vector + vector
- vsub.f s4, s12, s4
- vsub.f s5, s13, s5
- vsub.f s6, s14, s6
- vsub.f s7, s15, s7
- vsub.f s2, s17, s20 @ t2
- vadd.f s3, s19, s22 @ t6
- vstr d4, [\z0, #8*0] @ s8,s9
- vstr d5, [\z1, #8*o1] @ s10,s11
- vstr d2, [\z2, #8*o2] @ s4,s5
- vadd.f s4, s1, s0 @ t5
- vstr d3, [\z3, #8*o3] @ s6,s7
- vsub.f s7, s1, s0 @ t3
- vadd.f s5, s2, s3 @ t6
- vsub.f s6, s2, s3 @ t4
- vldr d6, [\z0, #8*1] @ s12,s13
- vldr d7, [\z1, #8*(o1+1)] @ s14,s15
- vadd.f s20, s4, s12 @ vector + vector
- vsub.f s4, s12, s4
- vsub.f s5, s13, s5
- vsub.f s6, s14, s6
- vsub.f s7, s15, s7
- vstr d10, [\z0, #8*1] @ s20,s21
- vstr d11, [\z1, #8*(o1+1)] @ s22,s23
- vstr d2, [\z2, #8*(o2+1)] @ s4,s5
- vstr d3, [\z3, #8*(o3+1)] @ s6,s7
-.endm
-
-.macro def_fft n, n2, n4
-function .Lfft\n\()_internal_vfp
- .if \n >= 512
- push {v1-v6,lr}
- .elseif \n >= 256
- push {v1-v2,v5-v6,lr}
- .else
- push {v1,v5-v6,lr}
- .endif
- mov v1, a1
- bl .Lfft\n2\()_internal_vfp
- add a1, v1, #8*(\n/4)*2
- bl .Lfft\n4\()_internal_vfp
- movrelx v5, X(ff_cos_\n), a1
- add a1, v1, #8*(\n/4)*3
- bl .Lfft\n4\()_internal_vfp
- .if \n >= 512
- .set o1, 0*(\n/4/2)
- .set o2, 0*(\n/4/2)
- .set o3, 0*(\n/4/2)
- add v2, v1, #8*2*(\n/4/2)
- add v3, v1, #8*4*(\n/4/2)
- add v4, v1, #8*6*(\n/4/2)
- pass (\n/4/2), v1, v2, v3, v4
- pop {v1-v6,pc}
- .elseif \n >= 256
- .set o1, 2*(\n/4/2)
- .set o2, 0*(\n/4/2)
- .set o3, 2*(\n/4/2)
- add v2, v1, #8*4*(\n/4/2)
- pass (\n/4/2), v1, v1, v2, v2
- pop {v1-v2,v5-v6,pc}
- .else
- .set o1, 2*(\n/4/2)
- .set o2, 4*(\n/4/2)
- .set o3, 6*(\n/4/2)
- pass (\n/4/2), v1, v1, v1, v1
- pop {v1,v5-v6,pc}
- .endif
-endfunc
-
-function fft\n\()_vfp
- ldr a3, =0x03030000 /* RunFast mode, vector length 4, stride 1 */
- fmrx a2, FPSCR
- fmxr FPSCR, a3
- vpush {s16-s31}
- mov ip, lr
- bl .Lfft\n\()_internal_vfp
- vpop {s16-s31}
- fmxr FPSCR, a2
- bx ip
-endfunc
-
-.ltorg
-.endm
-
- def_fft 32, 16, 8
- def_fft 64, 32, 16
- def_fft 128, 64, 32
- def_fft 256, 128, 64
- def_fft 512, 256, 128
- def_fft 1024, 512, 256
- def_fft 2048, 1024, 512
- def_fft 4096, 2048, 1024
- def_fft 8192, 4096, 2048
- def_fft 16384, 8192, 4096
- def_fft 32768, 16384, 8192
- def_fft 65536, 32768, 16384
diff --git a/libavcodec/arm/mdct_neon.S b/libavcodec/arm/mdct_neon.S
deleted file mode 100644
index a6952fa571..0000000000
--- a/libavcodec/arm/mdct_neon.S
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * ARM NEON optimised MDCT
- * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/arm/asm.S"
-
-#define ff_fft_calc_neon X(ff_fft_calc_neon)
-
-function ff_imdct_half_neon, export=1
- push {r4-r8,lr}
-
- mov r12, #1
- ldr lr, [r0, #20] @ mdct_bits
- ldr r4, [r0, #24] @ tcos
- ldr r3, [r0, #8] @ revtab
- lsl r12, r12, lr @ n = 1 << nbits
- lsr lr, r12, #2 @ n4 = n >> 2
- add r7, r2, r12, lsl #1
- mov r12, #-16
- sub r7, r7, #16
-
- vld2.32 {d16-d17},[r7,:128],r12 @ d16=x,n1 d17=x,n0
- vld2.32 {d0-d1}, [r2,:128]! @ d0 =m0,x d1 =m1,x
- vrev64.32 d17, d17
- vld2.32 {d2,d3}, [r4,:128]! @ d2=c0,c1 d3=s0,s2
- vmul.f32 d6, d17, d2
- vmul.f32 d7, d0, d2
-1:
- subs lr, lr, #2
- ldr r6, [r3], #4
- vmul.f32 d4, d0, d3
- vmul.f32 d5, d17, d3
- vsub.f32 d4, d6, d4
- vadd.f32 d5, d5, d7
- uxth r8, r6, ror #16
- uxth r6, r6
- add r8, r1, r8, lsl #3
- add r6, r1, r6, lsl #3
- beq 1f
- vld2.32 {d16-d17},[r7,:128],r12
- vld2.32 {d0-d1}, [r2,:128]!
- vrev64.32 d17, d17
- vld2.32 {d2,d3}, [r4,:128]! @ d2=c0,c1 d3=s0,s2
- vmul.f32 d6, d17, d2
- vmul.f32 d7, d0, d2
- vst2.32 {d4[0],d5[0]}, [r6,:64]
- vst2.32 {d4[1],d5[1]}, [r8,:64]
- b 1b
-1:
- vst2.32 {d4[0],d5[0]}, [r6,:64]
- vst2.32 {d4[1],d5[1]}, [r8,:64]
-
- mov r4, r0
- mov r6, r1
- bl ff_fft_calc_neon
-
- mov r12, #1
- ldr lr, [r4, #20] @ mdct_bits
- ldr r4, [r4, #24] @ tcos
- lsl r12, r12, lr @ n = 1 << nbits
- lsr lr, r12, #3 @ n8 = n >> 3
-
- add r4, r4, lr, lsl #3
- add r6, r6, lr, lsl #3
- sub r1, r4, #16
- sub r3, r6, #16
-
- mov r7, #-16
- mov r8, r6
- mov r0, r3
-
- vld2.32 {d0-d1}, [r3,:128], r7 @ d0 =i1,r1 d1 =i0,r0
- vld2.32 {d20-d21},[r6,:128]! @ d20=i2,r2 d21=i3,r3
- vld2.32 {d16,d18},[r1,:128], r7 @ d16=c1,c0 d18=s1,s0
-1:
- subs lr, lr, #2
- vmul.f32 d7, d0, d18
- vld2.32 {d17,d19},[r4,:128]! @ d17=c2,c3 d19=s2,s3
- vmul.f32 d4, d1, d18
- vmul.f32 d5, d21, d19
- vmul.f32 d6, d20, d19
- vmul.f32 d22, d1, d16
- vmul.f32 d23, d21, d17
- vmul.f32 d24, d0, d16
- vmul.f32 d25, d20, d17
- vadd.f32 d7, d7, d22
- vadd.f32 d6, d6, d23
- vsub.f32 d4, d4, d24
- vsub.f32 d5, d5, d25
- beq 1f
- vld2.32 {d0-d1}, [r3,:128], r7
- vld2.32 {d20-d21},[r6,:128]!
- vld2.32 {d16,d18},[r1,:128], r7 @ d16=c1,c0 d18=s1,s0
- vrev64.32 q3, q3
- vst2.32 {d4,d6}, [r0,:128], r7
- vst2.32 {d5,d7}, [r8,:128]!
- b 1b
-1:
- vrev64.32 q3, q3
- vst2.32 {d4,d6}, [r0,:128]
- vst2.32 {d5,d7}, [r8,:128]
-
- pop {r4-r8,pc}
-endfunc
-
-function ff_imdct_calc_neon, export=1
- push {r4-r6,lr}
-
- ldr r3, [r0, #20]
- mov r4, #1
- mov r5, r1
- lsl r4, r4, r3
- add r1, r1, r4
-
- bl X(ff_imdct_half_neon)
-
- add r0, r5, r4, lsl #2
- add r1, r5, r4, lsl #1
- sub r0, r0, #8
- sub r2, r1, #16
- mov r3, #-16
- mov r6, #-8
- vmov.i32 d30, #1<<31
-1:
- vld1.32 {d0-d1}, [r2,:128], r3
- pld [r0, #-16]
- vrev64.32 q0, q0
- vld1.32 {d2-d3}, [r1,:128]!
- veor d4, d1, d30
- pld [r2, #-16]
- vrev64.32 q1, q1
- veor d5, d0, d30
- vst1.32 {d2}, [r0,:64], r6
- vst1.32 {d3}, [r0,:64], r6
- vst1.32 {d4-d5}, [r5,:128]!
- subs r4, r4, #16
- bgt 1b
-
- pop {r4-r6,pc}
-endfunc
-
-function ff_mdct_calc_neon, export=1
- push {r4-r10,lr}
-
- mov r12, #1
- ldr lr, [r0, #20] @ mdct_bits
- ldr r4, [r0, #24] @ tcos
- ldr r3, [r0, #8] @ revtab
- lsl lr, r12, lr @ n = 1 << nbits
- add r7, r2, lr @ in4u
- sub r9, r7, #16 @ in4d
- add r2, r7, lr, lsl #1 @ in3u
- add r8, r9, lr, lsl #1 @ in3d
- add r5, r4, lr, lsl #1
- sub r5, r5, #16
- sub r3, r3, #4
- mov r12, #-16
-
- vld2.32 {d16,d18},[r9,:128],r12 @ in0u0,in0u1 in4d1,in4d0
- vld2.32 {d17,d19},[r8,:128],r12 @ in2u0,in2u1 in3d1,in3d0
- vld2.32 {d0, d2}, [r7,:128]! @ in4u0,in4u1 in2d1,in2d0
- vrev64.32 q9, q9 @ in4d0,in4d1 in3d0,in3d1
- vld2.32 {d1, d3}, [r2,:128]! @ in3u0,in3u1 in1d1,in1d0
- vsub.f32 d0, d18, d0 @ in4d-in4u I
- vld2.32 {d20,d21},[r4,:128]! @ c0,c1 s0,s1
- vrev64.32 q1, q1 @ in2d0,in2d1 in1d0,in1d1
- vld2.32 {d30,d31},[r5,:128],r12 @ c2,c3 s2,s3
- vadd.f32 d1, d1, d19 @ in3u+in3d -R
- vsub.f32 d16, d16, d2 @ in0u-in2d R
- vadd.f32 d17, d17, d3 @ in2u+in1d -I
-1:
- vmul.f32 d7, d0, d21 @ I*s
-A ldr r10, [r3, lr, lsr #1]
-T lsr r10, lr, #1
-T ldr r10, [r3, r10]
- vmul.f32 d6, d1, d20 @ -R*c
- ldr r6, [r3, #4]!
- vmul.f32 d4, d1, d21 @ -R*s
- vmul.f32 d5, d0, d20 @ I*c
- vmul.f32 d24, d16, d30 @ R*c
- vmul.f32 d25, d17, d31 @ -I*s
- vmul.f32 d22, d16, d31 @ R*s
- vmul.f32 d23, d17, d30 @ I*c
- subs lr, lr, #16
- vsub.f32 d6, d6, d7 @ -R*c-I*s
- vadd.f32 d7, d4, d5 @ -R*s+I*c
- vsub.f32 d24, d25, d24 @ I*s-R*c
- vadd.f32 d25, d22, d23 @ R*s-I*c
- beq 1f
- mov r12, #-16
- vld2.32 {d16,d18},[r9,:128],r12 @ in0u0,in0u1 in4d1,in4d0
- vld2.32 {d17,d19},[r8,:128],r12 @ in2u0,in2u1 in3d1,in3d0
- vneg.f32 d7, d7 @ R*s-I*c
- vld2.32 {d0, d2}, [r7,:128]! @ in4u0,in4u1 in2d1,in2d0
- vrev64.32 q9, q9 @ in4d0,in4d1 in3d0,in3d1
- vld2.32 {d1, d3}, [r2,:128]! @ in3u0,in3u1 in1d1,in1d0
- vsub.f32 d0, d18, d0 @ in4d-in4u I
- vld2.32 {d20,d21},[r4,:128]! @ c0,c1 s0,s1
- vrev64.32 q1, q1 @ in2d0,in2d1 in1d0,in1d1
- vld2.32 {d30,d31},[r5,:128],r12 @ c2,c3 s2,s3
- vadd.f32 d1, d1, d19 @ in3u+in3d -R
- vsub.f32 d16, d16, d2 @ in0u-in2d R
- vadd.f32 d17, d17, d3 @ in2u+in1d -I
- uxth r12, r6, ror #16
- uxth r6, r6
- add r12, r1, r12, lsl #3
- add r6, r1, r6, lsl #3
- vst2.32 {d6[0],d7[0]}, [r6,:64]
- vst2.32 {d6[1],d7[1]}, [r12,:64]
- uxth r6, r10, ror #16
- uxth r10, r10
- add r6 , r1, r6, lsl #3
- add r10, r1, r10, lsl #3
- vst2.32 {d24[0],d25[0]},[r10,:64]
- vst2.32 {d24[1],d25[1]},[r6,:64]
- b 1b
-1:
- vneg.f32 d7, d7 @ R*s-I*c
- uxth r12, r6, ror #16
- uxth r6, r6
- add r12, r1, r12, lsl #3
- add r6, r1, r6, lsl #3
- vst2.32 {d6[0],d7[0]}, [r6,:64]
- vst2.32 {d6[1],d7[1]}, [r12,:64]
- uxth r6, r10, ror #16
- uxth r10, r10
- add r6 , r1, r6, lsl #3
- add r10, r1, r10, lsl #3
- vst2.32 {d24[0],d25[0]},[r10,:64]
- vst2.32 {d24[1],d25[1]},[r6,:64]
-
- mov r4, r0
- mov r6, r1
- bl ff_fft_calc_neon
-
- mov r12, #1
- ldr lr, [r4, #20] @ mdct_bits
- ldr r4, [r4, #24] @ tcos
- lsl r12, r12, lr @ n = 1 << nbits
- lsr lr, r12, #3 @ n8 = n >> 3
-
- add r4, r4, lr, lsl #3
- add r6, r6, lr, lsl #3
- sub r1, r4, #16
- sub r3, r6, #16
-
- mov r7, #-16
- mov r8, r6
- mov r0, r3
-
- vld2.32 {d0-d1}, [r3,:128], r7 @ d0 =r1,i1 d1 =r0,i0
- vld2.32 {d20-d21},[r6,:128]! @ d20=r2,i2 d21=r3,i3
- vld2.32 {d16,d18},[r1,:128], r7 @ c1,c0 s1,s0
-1:
- subs lr, lr, #2
- vmul.f32 d7, d0, d18 @ r1*s1,r0*s0
- vld2.32 {d17,d19},[r4,:128]! @ c2,c3 s2,s3
- vmul.f32 d4, d1, d18 @ i1*s1,i0*s0
- vmul.f32 d5, d21, d19 @ i2*s2,i3*s3
- vmul.f32 d6, d20, d19 @ r2*s2,r3*s3
- vmul.f32 d24, d0, d16 @ r1*c1,r0*c0
- vmul.f32 d25, d20, d17 @ r2*c2,r3*c3
- vmul.f32 d22, d21, d17 @ i2*c2,i3*c3
- vmul.f32 d23, d1, d16 @ i1*c1,i0*c0
- vadd.f32 d4, d4, d24 @ i1*s1+r1*c1,i0*s0+r0*c0
- vadd.f32 d5, d5, d25 @ i2*s2+r2*c2,i3*s3+r3*c3
- vsub.f32 d6, d22, d6 @ i2*c2-r2*s2,i3*c3-r3*s3
- vsub.f32 d7, d23, d7 @ i1*c1-r1*s1,i0*c0-r0*s0
- vneg.f32 q2, q2
- beq 1f
- vld2.32 {d0-d1}, [r3,:128], r7
- vld2.32 {d20-d21},[r6,:128]!
- vld2.32 {d16,d18},[r1,:128], r7 @ c1,c0 s1,s0
- vrev64.32 q3, q3
- vst2.32 {d4,d6}, [r0,:128], r7
- vst2.32 {d5,d7}, [r8,:128]!
- b 1b
-1:
- vrev64.32 q3, q3
- vst2.32 {d4,d6}, [r0,:128]
- vst2.32 {d5,d7}, [r8,:128]
-
- pop {r4-r10,pc}
-endfunc
diff --git a/libavcodec/arm/mdct_vfp.S b/libavcodec/arm/mdct_vfp.S
deleted file mode 100644
index 43f6d14c0c..0000000000
--- a/libavcodec/arm/mdct_vfp.S
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * Copyright (c) 2013 RISC OS Open Ltd
- * Author: Ben Avison <bavison@riscosopen.org>
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/arm/asm.S"
-
-CONTEXT .req a1
-ORIGOUT .req a2
-IN .req a3
-OUT .req v1
-REVTAB .req v2
-TCOS .req v3
-TSIN .req v4
-OLDFPSCR .req v5
-J0 .req a2
-J1 .req a4
-J2 .req ip
-J3 .req lr
-REVTAB_HI .req v5
-IN_HI .req v6
-OUT_HI .req v6
-TCOS_HI .req sl
-TSIN_HI .req fp
-
-.macro prerotation_innerloop
- .set trig_lo, k
- .set trig_hi, n4 - k - 2
- .set in_lo, trig_lo * 2
- .set in_hi, trig_hi * 2
- vldr d8, [TCOS, #trig_lo*4] @ s16,s17
- vldr d9, [TCOS, #trig_hi*4] @ s18,s19
- vldr s0, [IN, #in_hi*4 + 12]
- vldr s1, [IN, #in_hi*4 + 4]
- vldr s2, [IN, #in_lo*4 + 12]
- vldr s3, [IN, #in_lo*4 + 4]
- vmul.f s8, s0, s16 @ vector operation
- vldr d10, [TSIN, #trig_lo*4] @ s20,s21
- vldr d11, [TSIN, #trig_hi*4] @ s22,s23
- vldr s4, [IN, #in_lo*4]
- vldr s5, [IN, #in_lo*4 + 8]
- vldr s6, [IN, #in_hi*4]
- vldr s7, [IN, #in_hi*4 + 8]
- ldr J0, [REVTAB, #trig_lo*2]
- vmul.f s12, s0, s20 @ vector operation
- ldr J2, [REVTAB, #trig_hi*2]
- mov J1, J0, lsr #16
- and J0, J0, #255 @ halfword value will be < n4
- vmls.f s8, s4, s20 @ vector operation
- mov J3, J2, lsr #16
- and J2, J2, #255 @ halfword value will be < n4
- add J0, OUT, J0, lsl #3
- vmla.f s12, s4, s16 @ vector operation
- add J1, OUT, J1, lsl #3
- add J2, OUT, J2, lsl #3
- add J3, OUT, J3, lsl #3
- vstr s8, [J0]
- vstr s9, [J1]
- vstr s10, [J2]
- vstr s11, [J3]
- vstr s12, [J0, #4]
- vstr s13, [J1, #4]
- vstr s14, [J2, #4]
- vstr s15, [J3, #4]
- .set k, k + 2
-.endm
-
-.macro prerotation_innerloop_rolled
- vldmia TCOS!, {s16,s17}
- vldmdb TCOS_HI!, {s18,s19}
- vldr s0, [IN_HI, #-4]
- vldr s1, [IN_HI, #-12]
- vldr s2, [IN, #12]
- vldr s3, [IN, #4]
- vmul.f s8, s0, s16 @ vector operation
- vldmia TSIN!, {s20,s21}
- vldmdb TSIN_HI!, {s22,s23}
- vldr s4, [IN]
- vldr s5, [IN, #8]
- vldr s6, [IN_HI, #-16]
- vldr s7, [IN_HI, #-8]
- vmul.f s12, s0, s20 @ vector operation
- add IN, IN, #16
- sub IN_HI, IN_HI, #16
- ldrh J0, [REVTAB], #2
- ldrh J1, [REVTAB], #2
- vmls.f s8, s4, s20 @ vector operation
- ldrh J3, [REVTAB_HI, #-2]!
- ldrh J2, [REVTAB_HI, #-2]!
- add J0, OUT, J0, lsl #3
- vmla.f s12, s4, s16 @ vector operation
- add J1, OUT, J1, lsl #3
- add J2, OUT, J2, lsl #3
- add J3, OUT, J3, lsl #3
- vstr s8, [J0]
- vstr s9, [J1]
- vstr s10, [J2]
- vstr s11, [J3]
- vstr s12, [J0, #4]
- vstr s13, [J1, #4]
- vstr s14, [J2, #4]
- vstr s15, [J3, #4]
-.endm
-
-.macro postrotation_innerloop tail, head
- .set trig_lo_head, n8 - k - 2
- .set trig_hi_head, n8 + k
- .set out_lo_head, trig_lo_head * 2
- .set out_hi_head, trig_hi_head * 2
- .set trig_lo_tail, n8 - (k - 2) - 2
- .set trig_hi_tail, n8 + (k - 2)
- .set out_lo_tail, trig_lo_tail * 2
- .set out_hi_tail, trig_hi_tail * 2
- .if (k & 2) == 0
- TCOS_D0_HEAD .req d10 @ s20,s21
- TCOS_D1_HEAD .req d11 @ s22,s23
- TCOS_S0_TAIL .req s24
- .else
- TCOS_D0_HEAD .req d12 @ s24,s25
- TCOS_D1_HEAD .req d13 @ s26,s27
- TCOS_S0_TAIL .req s20
- .endif
- .ifnc "\tail",""
- vmls.f s8, s0, TCOS_S0_TAIL @ vector operation
- .endif
- .ifnc "\head",""
- vldr d8, [TSIN, #trig_lo_head*4] @ s16,s17
- vldr d9, [TSIN, #trig_hi_head*4] @ s18,s19
- vldr TCOS_D0_HEAD, [TCOS, #trig_lo_head*4]
- .endif
- .ifnc "\tail",""
- vmla.f s12, s4, TCOS_S0_TAIL @ vector operation
- .endif
- .ifnc "\head",""
- vldr s0, [OUT, #out_lo_head*4]
- vldr s1, [OUT, #out_lo_head*4 + 8]
- vldr s2, [OUT, #out_hi_head*4]
- vldr s3, [OUT, #out_hi_head*4 + 8]
- vldr s4, [OUT, #out_lo_head*4 + 4]
- vldr s5, [OUT, #out_lo_head*4 + 12]
- vldr s6, [OUT, #out_hi_head*4 + 4]
- vldr s7, [OUT, #out_hi_head*4 + 12]
- .endif
- .ifnc "\tail",""
- vstr s8, [OUT, #out_lo_tail*4]
- vstr s9, [OUT, #out_lo_tail*4 + 8]
- vstr s10, [OUT, #out_hi_tail*4]
- vstr s11, [OUT, #out_hi_tail*4 + 8]
- .endif
- .ifnc "\head",""
- vmul.f s8, s4, s16 @ vector operation
- .endif
- .ifnc "\tail",""
- vstr s12, [OUT, #out_hi_tail*4 + 12]
- vstr s13, [OUT, #out_hi_tail*4 + 4]
- vstr s14, [OUT, #out_lo_tail*4 + 12]
- vstr s15, [OUT, #out_lo_tail*4 + 4]
- .endif
- .ifnc "\head",""
- vmul.f s12, s0, s16 @ vector operation
- vldr TCOS_D1_HEAD, [TCOS, #trig_hi_head*4]
- .endif
- .unreq TCOS_D0_HEAD
- .unreq TCOS_D1_HEAD
- .unreq TCOS_S0_TAIL
- .ifnc "\head",""
- .set k, k + 2
- .endif
-.endm
-
-.macro postrotation_innerloop_rolled tail, head, tcos_s0_head, tcos_s1_head, tcos_s2_head, tcos_s3_head, tcos_s0_tail, out_offset_head, out_offset_tail
- .ifnc "\tail",""
- vmls.f s8, s0, \tcos_s0_tail @ vector operation
- .endif
- .ifnc "\head",""
- vldmia TSIN!, {s16,s17}
- vldmdb TSIN_HI!, {s18,s19}
- vldmia TCOS!, {\tcos_s0_head,\tcos_s1_head}
- .endif
- .ifnc "\tail",""
- vmla.f s12, s4, \tcos_s0_tail @ vector operation
- .endif
- .ifnc "\head",""
- vldr s0, [OUT, #+\out_offset_head+0]
- vldr s1, [OUT, #+\out_offset_head+8]
- vldr s2, [OUT_HI, #-\out_offset_head-16]
- vldr s3, [OUT_HI, #-\out_offset_head-8]
- vldr s4, [OUT, #+\out_offset_head+4]
- vldr s5, [OUT, #+\out_offset_head+12]
- vldr s6, [OUT_HI, #-\out_offset_head-12]
- vldr s7, [OUT_HI, #-\out_offset_head-4]
- .endif
- .ifnc "\tail",""
- vstr s8, [OUT, #+\out_offset_tail+0]
- vstr s9, [OUT, #+\out_offset_tail+8]
- vstr s10, [OUT_HI, #-\out_offset_tail-16]
- vstr s11, [OUT_HI, #-\out_offset_tail-8]
- .endif
- .ifnc "\head",""
- vmul.f s8, s4, s16 @ vector operation
- .endif
- .ifnc "\tail",""
- vstr s12, [OUT_HI, #-\out_offset_tail-4]
- vstr s13, [OUT_HI, #-\out_offset_tail-12]
- vstr s14, [OUT, #+\out_offset_tail+12]
- vstr s15, [OUT, #+\out_offset_tail+4]
- .endif
- .ifnc "\head",""
- vmul.f s12, s0, s16 @ vector operation
- vldmdb TCOS_HI!, {\tcos_s2_head,\tcos_s3_head}
- .endif
-.endm
-
-
-/* void ff_imdct_half_vfp(FFTContext *s,
- * FFTSample *output,
- * const FFTSample *input)
- */
-function ff_imdct_half_vfp, export=1
- ldr ip, [CONTEXT, #5*4] @ mdct_bits
- teq ip, #6
- bne 10f
-
- .set n, 1<<6
- .set n2, n/2
- .set n4, n/4
- .set n8, n/8
-
- push {v1-v5,lr}
- vpush {s16-s27}
- fmrx OLDFPSCR, FPSCR
- ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1
- fmxr FPSCR, lr
- mov OUT, ORIGOUT
- ldr REVTAB, [CONTEXT, #2*4]
- ldr TCOS, [CONTEXT, #6*4]
- ldr TSIN, [CONTEXT, #7*4]
-
- .set k, 0
- .rept n8/2
- prerotation_innerloop
- .endr
-
- fmxr FPSCR, OLDFPSCR
- mov a1, OUT
- bl X(ff_fft16_vfp)
- ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1
- fmxr FPSCR, lr
-
- .set k, 0
- postrotation_innerloop , head
- .rept n8/2 - 1
- postrotation_innerloop tail, head
- .endr
- postrotation_innerloop tail
-
- fmxr FPSCR, OLDFPSCR
- vpop {s16-s27}
- pop {v1-v5,pc}
-
-10:
- push {v1-v6,sl,fp,lr}
- vpush {s16-s27}
- fmrx OLDFPSCR, FPSCR
- ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1
- fmxr FPSCR, lr
- mov lr, #1
- mov OUT, ORIGOUT
- ldr REVTAB, [CONTEXT, #2*4]
- ldr TCOS, [CONTEXT, #6*4]
- ldr TSIN, [CONTEXT, #7*4]
- mov lr, lr, lsl ip
-
- push {CONTEXT,OLDFPSCR}
- add IN_HI, IN, lr, lsl #1
- add REVTAB_HI, REVTAB, lr, lsr #1
- add TCOS_HI, TCOS, lr
- add TSIN_HI, TSIN, lr
-0: prerotation_innerloop_rolled
- teq IN, IN_HI
- bne 0b
- ldmia sp, {CONTEXT,OLDFPSCR}
-
- mov ORIGOUT, OUT
- fmxr FPSCR, OLDFPSCR
- ldr ip, [CONTEXT, #9*4]
- blx ip @ s->fft_calc(s, output)
-
- pop {CONTEXT,OLDFPSCR}
- ldr lr, =0x03030000 @ RunFast mode, short vectors of length 4, stride 1
- ldr ip, [CONTEXT, #5*4] @ mdct_bits
- fmxr FPSCR, lr
- mov lr, #1
- mov lr, lr, lsl ip
- sub TCOS, TCOS, lr, lsr #1
- sub TSIN, TSIN, lr, lsr #1
- add OUT_HI, OUT, lr, lsl #1
- add TCOS_HI, TCOS, lr
- add TSIN_HI, TSIN, lr
- postrotation_innerloop_rolled , head, s20, s21, s22, s23,, 0
- b 1f
-0: add OUT, OUT, #32
- sub OUT_HI, OUT_HI, #32
- postrotation_innerloop_rolled tail, head, s20, s21, s22, s23, s24, 0, -16
-1: postrotation_innerloop_rolled tail, head, s24, s25, s26, s27, s20, 16, 0
- teq TSIN, TSIN_HI
- bne 0b
- postrotation_innerloop_rolled tail,,,,,, s24,, 16
-
- fmxr FPSCR, OLDFPSCR
- vpop {s16-s27}
- pop {v1-v6,sl,fp,pc}
-endfunc
-
- .unreq CONTEXT
- .unreq ORIGOUT
- .unreq IN
- .unreq OUT
- .unreq REVTAB
- .unreq TCOS
- .unreq TSIN
- .unreq OLDFPSCR
- .unreq J0
- .unreq J1
- .unreq J2
- .unreq J3
- .unreq REVTAB_HI
- .unreq IN_HI
- .unreq OUT_HI
- .unreq TCOS_HI
- .unreq TSIN_HI
diff --git a/libavcodec/arm/rdft_init_arm.c b/libavcodec/arm/rdft_init_arm.c
deleted file mode 100644
index 1c5d8beb61..0000000000
--- a/libavcodec/arm/rdft_init_arm.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/attributes.h"
-#include "libavutil/cpu.h"
-#include "libavutil/arm/cpu.h"
-
-#include "libavcodec/rdft.h"
-
-void ff_rdft_calc_neon(struct RDFTContext *s, FFTSample *z);
-
-av_cold void ff_rdft_init_arm(RDFTContext *s)
-{
- int cpu_flags = av_get_cpu_flags();
-
- if (have_neon(cpu_flags))
- s->rdft_calc = ff_rdft_calc_neon;
-}
diff --git a/libavcodec/arm/rdft_neon.S b/libavcodec/arm/rdft_neon.S
deleted file mode 100644
index eabb92b4bd..0000000000
--- a/libavcodec/arm/rdft_neon.S
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * ARM NEON optimised RDFT
- * Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
- *
- * This file is part of FFmpeg.
- *
- * FFmpeg is free software; you can redistribute it and/or
- * modify it under the terms of the GNU Lesser General Public
- * License as published by the Free Software Foundation; either
- * version 2.1 of the License, or (at your option) any later version.
- *
- * FFmpeg is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public
- * License along with FFmpeg; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include "libavutil/arm/asm.S"
-
-function ff_rdft_calc_neon, export=1
- push {r4-r8,lr}
-
- ldr r6, [r0, #4] @ inverse
- mov r4, r0
- mov r5, r1
-
- lsls r6, r6, #31
- bne 1f
- add r0, r4, #24
- bl X(ff_fft_permute_neon)
- add r0, r4, #24
- mov r1, r5
- bl X(ff_fft_calc_neon)
-1:
- ldr r12, [r4, #0] @ nbits
- mov r2, #1
- ldr r8, [r4, #20] @ negative_sin
- lsl r12, r2, r12
- add r0, r5, #8
- lsl r8, r8, #31
- add r1, r5, r12, lsl #2
- lsr r12, r12, #2
- vdup.32 d26, r8
- ldr r2, [r4, #12] @ tcos
- sub r12, r12, #2
- ldr r3, [r4, #16] @ tsin
- mov r7, r0
- sub r1, r1, #8
- mov lr, r1
- mov r8, #-8
- vld1.32 {d0}, [r0,:64]! @ d1[0,1]
- vld1.32 {d1}, [r1,:64], r8 @ d2[0,1]
- vld1.32 {d4}, [r2,:64]! @ tcos[i]
- vld1.32 {d5}, [r3,:64]! @ tsin[i]
- vmov.f32 d18, #0.5 @ k1
- vdup.32 d19, r6
- veor d5, d26, d5
- pld [r0, #32]
- veor d19, d18, d19 @ k2
- vmov.i32 d16, #0
- vmov.i32 d17, #1<<31
- pld [r1, #-32]
- vtrn.32 d16, d17
- pld [r2, #32]
- vrev64.32 d16, d16 @ d16=1,0 d17=0,1
- pld [r3, #32]
-2:
- veor q1, q0, q8 @ -d1[0],d1[1], d2[0],-d2[1]
- vld1.32 {d24}, [r0,:64]! @ d1[0,1]
- vadd.f32 d0, d0, d3 @ d1[0]+d2[0], d1[1]-d2[1]
- vld1.32 {d25}, [r1,:64], r8 @ d2[0,1]
- vadd.f32 d1, d2, d1 @ -d1[0]+d2[0], d1[1]+d2[1]
- veor q3, q12, q8 @ -d1[0],d1[1], d2[0],-d2[1]
- pld [r0, #32]
- vmul.f32 q10, q0, q9 @ ev.re, ev.im, od.im, od.re
- pld [r1, #-32]
- vadd.f32 d0, d24, d7 @ d1[0]+d2[0], d1[1]-d2[1]
- vadd.f32 d1, d6, d25 @ -d1[0]+d2[0], d1[1]+d2[1]
- vmul.f32 q11, q0, q9 @ ev.re, ev.im, od.im, od.re
- veor d7, d21, d16 @ -od.im, od.re
- vrev64.32 d3, d21 @ od.re, od.im
- veor d6, d20, d17 @ ev.re,-ev.im
- veor d2, d3, d16 @ -od.re, od.im
- vmla.f32 d20, d3, d4[1]
- vmla.f32 d20, d7, d5[1]
- vmla.f32 d6, d2, d4[1]
- vmla.f32 d6, d21, d5[1]
- vld1.32 {d4}, [r2,:64]! @ tcos[i]
- veor d7, d23, d16 @ -od.im, od.re
- vld1.32 {d5}, [r3,:64]! @ tsin[i]
- veor d24, d22, d17 @ ev.re,-ev.im
- vrev64.32 d3, d23 @ od.re, od.im
- veor d5, d26, d5
- pld [r2, #32]
- veor d2, d3, d16 @ -od.re, od.im
- pld [r3, #32]
- vmla.f32 d22, d3, d4[0]
- vmla.f32 d22, d7, d5[0]
- vmla.f32 d24, d2, d4[0]
- vmla.f32 d24, d23, d5[0]
- vld1.32 {d0}, [r0,:64]! @ d1[0,1]
- vld1.32 {d1}, [r1,:64], r8 @ d2[0,1]
- vst1.32 {d20}, [r7,:64]!
- vst1.32 {d6}, [lr,:64], r8
- vst1.32 {d22}, [r7,:64]!
- vst1.32 {d24}, [lr,:64], r8
- subs r12, r12, #2
- bgt 2b
-
- veor q1, q0, q8 @ -d1[0],d1[1], d2[0],-d2[1]
- vadd.f32 d0, d0, d3 @ d1[0]+d2[0], d1[1]-d2[1]
- vadd.f32 d1, d2, d1 @ -d1[0]+d2[0], d1[1]+d2[1]
- ldr r2, [r4, #8] @ sign_convention
- vmul.f32 q10, q0, q9 @ ev.re, ev.im, od.im, od.re
- add r0, r0, #4
- bfc r2, #0, #31
- vld1.32 {d0[0]}, [r0,:32]
- veor d7, d21, d16 @ -od.im, od.re
- vrev64.32 d3, d21 @ od.re, od.im
- veor d6, d20, d17 @ ev.re,-ev.im
- vld1.32 {d22}, [r5,:64]
- vdup.32 d1, r2
- vmov d23, d22
- veor d2, d3, d16 @ -od.re, od.im
- vtrn.32 d22, d23
- veor d0, d0, d1
- veor d23, d23, d17
- vmla.f32 d20, d3, d4[1]
- vmla.f32 d20, d7, d5[1]
- vmla.f32 d6, d2, d4[1]
- vmla.f32 d6, d21, d5[1]
- vadd.f32 d22, d22, d23
- vst1.32 {d20}, [r7,:64]
- vst1.32 {d6}, [lr,:64]
- vst1.32 {d0[0]}, [r0,:32]
- vst1.32 {d22}, [r5,:64]
-
- cmp r6, #0
- it eq
- popeq {r4-r8,pc}
-
- vmul.f32 d22, d22, d18
- vst1.32 {d22}, [r5,:64]
- add r0, r4, #24
- mov r1, r5
- bl X(ff_fft_permute_neon)
- add r0, r4, #24
- mov r1, r5
- pop {r4-r8,lr}
- b X(ff_fft_calc_neon)
-endfunc
diff --git a/libavcodec/arm/synth_filter_init_arm.c b/libavcodec/arm/synth_filter_init_arm.c
index 858c117d39..10689b62e6 100644
--- a/libavcodec/arm/synth_filter_init_arm.c
+++ b/libavcodec/arm/synth_filter_init_arm.c
@@ -23,7 +23,6 @@
#include "libavutil/arm/cpu.h"
#include "libavutil/attributes.h"
#include "libavutil/internal.h"
-#include "libavcodec/fft.h"
#include "libavcodec/synth_filter.h"
void ff_synth_filter_float_vfp(AVTXContext *imdct,
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-25 06:39:11 +0000