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authorMans Rullgard <mans@mansr.com>2012-07-31 23:58:58 +0100
committerMans Rullgard <mans@mansr.com>2012-08-01 10:32:24 +0100
commit998170913c759c45f913f9c20d7b18e6505f7cde (patch)
tree315ca1b9f375d9ba37b97db16bea64fd4c9343e6 /libavcodec/arm/simple_idct_neon.S
parentb6a3849adb0381a437952a785d39e22cb3b00282 (diff)
ARM: use standard syntax for all LDRD/STRD instructions
The standard syntax requires two destination registers for LDRD/STRD instructions. Some versions of the GNU assembler allow using only one with the second implicit, others are more strict. Signed-off-by: Mans Rullgard <mans@mansr.com>
Diffstat (limited to 'libavcodec/arm/simple_idct_neon.S')
-rw-r--r--libavcodec/arm/simple_idct_neon.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/libavcodec/arm/simple_idct_neon.S b/libavcodec/arm/simple_idct_neon.S
index df24a45270..b3e97d515d 100644
--- a/libavcodec/arm/simple_idct_neon.S
+++ b/libavcodec/arm/simple_idct_neon.S
@@ -159,8 +159,8 @@ function idct_col4_neon
vmull.s16 q15, d30, w4 /* q15 = W4*(col[0]+(1<<COL_SHIFT-1)/W4)*/
vld1.64 {d8}, [r2,:64], ip /* d5 = col[3] */
- ldrd r4, [r2]
- ldrd r6, [r2, #16]
+ ldrd r4, r5, [r2]
+ ldrd r6, r7, [r2, #16]
orrs r4, r4, r5
idct_col4_top
@@ -176,7 +176,7 @@ function idct_col4_neon
vadd.i32 q14, q14, q7
1: orrs r6, r6, r7
- ldrd r4, [r2, #16]
+ ldrd r4, r5, [r2, #16]
it eq
addeq r2, r2, #16
beq 2f
@@ -188,7 +188,7 @@ function idct_col4_neon
vmlal.s16 q6, d5, w3 /* q6 += W3 * col[5] */
2: orrs r4, r4, r5
- ldrd r4, [r2, #16]
+ ldrd r4, r5, [r2, #16]
it eq
addeq r2, r2, #16
beq 3f