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| author | Michael Niedermayer <michaelni@gmx.at> | 2011-06-24 02:54:12 +0200 |
|---|---|---|
| committer | Michael Niedermayer <michaelni@gmx.at> | 2011-06-24 03:07:04 +0200 |
| commit | 686959e87e377c0494da636640e36779dd985c30 (patch) | |
| tree | 8c4674c56f291638686e6bc3efafe0ef2b921327 /libavcodec/arm/dcadsp_neon.S | |
| parent | ffc6c8a4305d25db8a5af72389a2453b17f43646 (diff) | |
| parent | adbfc605f6bbe87b292c82cd1f5d4d974fa6b73c (diff) | |
Merge remote-tracking branch 'qatar/master'
* qatar/master:
doxygen: Consistently use '@' instead of '\' for Doxygen markup.
Use av_printf_format to check the usage of printf style functions
Add av_printf_format, for marking printf style format strings and their parameters
ARM: enable thumb for Cortex-M* CPUs
nsvdec: Propagate error values instead of returning 0 in nsv_read_header().
build: remove SRC_PATH_BARE variable
build: move basic rules and variables to main Makefile
build: move special targets to end of main Makefile
lavdev: improve feedback in case of invalid frame rate/size
vfwcap: prefer "framerate_q" over "fps" in vfw_read_header()
v4l2: prefer "framerate_q" over "fps" in v4l2_set_parameters()
fbdev: prefer "framerate_q" over "fps" in device context
bktr: prefer "framerate" over "fps" for grab_read_header()
ALSA: implement channel layout for playback.
alsa: support unsigned variants of already supported signed formats.
alsa: add support for more formats.
ARM: allow building in Thumb2 mode
Conflicts:
common.mak
doc/APIchanges
libavcodec/vdpau.h
libavdevice/alsa-audio-common.c
libavdevice/fbdev.c
libavdevice/libdc1394.c
libavutil/avutil.h
Merged-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'libavcodec/arm/dcadsp_neon.S')
| -rw-r--r-- | libavcodec/arm/dcadsp_neon.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/libavcodec/arm/dcadsp_neon.S b/libavcodec/arm/dcadsp_neon.S index c3bddd3e41..852527a59e 100644 --- a/libavcodec/arm/dcadsp_neon.S +++ b/libavcodec/arm/dcadsp_neon.S @@ -27,6 +27,7 @@ function ff_dca_lfe_fir_neon, export=1 add r5, r2, #256*4-16 @ cf1 sub r1, r1, #12 cmp r3, #32 + ite eq moveq r6, #256/32 movne r6, #256/64 NOVFP vldr s0, [sp, #16] @ scale |