diff options
| author | Shiyou Yin <yinshiyou-hf@loongson.cn> | 2019-07-31 09:30:01 +0800 |
|---|---|---|
| committer | Reimar Döffinger <Reimar.Doeffinger@gmx.de> | 2019-08-02 19:01:51 +0200 |
| commit | 11f99a9a45925e14409eff65606973676d7376b6 (patch) | |
| tree | 1b2fb7f566a83cdf206d31fcbe184df8d6a07a53 | |
| parent | 9a2dbfde2e3167cd6f751af38805a1a743eb2470 (diff) | |
avutil/mips: Avoid instruction exception caused by gssqc1/gslqc1.
Ensure the address accesed by gssqc1/gslqc1 are 16-byte aligned.
| -rw-r--r-- | libavcodec/mips/simple_idct_mmi.c | 2 | ||||
| -rw-r--r-- | libavutil/mips/mmiutils.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/libavcodec/mips/simple_idct_mmi.c b/libavcodec/mips/simple_idct_mmi.c index 7f4bb74fd2..73d797ffbc 100644 --- a/libavcodec/mips/simple_idct_mmi.c +++ b/libavcodec/mips/simple_idct_mmi.c @@ -39,7 +39,7 @@ #define COL_SHIFT 20 #define DC_SHIFT 3 -DECLARE_ALIGNED(8, const int16_t, W_arr)[46] = { +DECLARE_ALIGNED(16, const int16_t, W_arr)[46] = { W4, W2, W4, W6, W1, W3, W5, W7, W4, W6, -W4, -W2, diff --git a/libavutil/mips/mmiutils.h b/libavutil/mips/mmiutils.h index 05f6b31155..8f692e86c5 100644 --- a/libavutil/mips/mmiutils.h +++ b/libavutil/mips/mmiutils.h @@ -205,7 +205,7 @@ * backup register */ #define BACKUP_REG \ - double temp_backup_reg[8]; \ + LOCAL_ALIGNED_16(double, temp_backup_reg, [8]); \ if (_MIPS_SIM == _ABI64) \ __asm__ volatile ( \ "gssqc1 $f25, $f24, 0x00(%[temp]) \n\t" \ |